Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 )
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support ......................................................................
Patch Set 11:
(4 comments)
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/K... File src/drivers/intel/fsp2_0/Kconfig:
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/K... PS11, Line 27: impacts impact
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/i... File src/drivers/intel/fsp2_0/include/fsp/info_header.h:
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/i... PS11, Line 33: size_t multi_phase_si_init_entry_offset; Doesn't this make the struct layout incompatible with FSP 2.1?
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/i... File src/drivers/intel/fsp2_0/include/fsp/util.h:
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/i... PS11, Line 36: uint32_t phase_index Are these phase indices enumerated? If so, I'd use an enum for this
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/s... File src/drivers/intel/fsp2_0/silicon_init.c:
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/s... PS11, Line 57: BIOS_SPEW BIOS_EMERG
Or just have a single line:
die_with_post_code(postcode, "FspSiliconInit returned with error 0x%08x\n", status);