Nitheesh Sekar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32545
Change subject: coreboot: Add i2c clock API for qcs405 ......................................................................
coreboot: Add i2c clock API for qcs405
Add support of i2c clock enable, disable and configure API.
Change-Id: Ia0b42357ac09bf0ab60aad18c44e5ef27fe9dac3 Signed-off-by: Shefali Jain shefjain@codeaurora.org Signed-off-by: Taniya Das tdas@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/include/soc/clock.h 2 files changed, 24 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/32545/1
diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c index 302652b..56824a4 100644 --- a/src/soc/qualcomm/qcs405/clock.c +++ b/src/soc/qualcomm/qcs405/clock.c @@ -246,6 +246,14 @@ clock_configure(spi_clk, spi_cfg, hz, ARRAY_SIZE(spi_cfg)); }
+void clock_configure_i2c(uint32_t hz) +{ + struct qcs405_clock *i2c_clk = + (struct qcs405_clock *)&gcc->blsp1_qup1_i2c_clk; + + clock_configure(i2c_clk, i2c_cfg, hz, ARRAY_SIZE(i2c_cfg)); +} + void clock_enable_uart(void) { clock_enable(&gcc->blsp1_uart2_apps_cbcr); @@ -309,6 +317,16 @@
}
+void clock_enable_i2c(void) +{ + clock_enable(&gcc->blsp1_qup1_i2c_apps_cbcr); +} + +void clock_disable_i2c(void) +{ + clock_disable(&gcc->blsp1_qup1_i2c_apps_cbcr); +} + void clock_init(void) { clock_configure_gpll0(); diff --git a/src/soc/qualcomm/qcs405/include/soc/clock.h b/src/soc/qualcomm/qcs405/include/soc/clock.h index 8638128..55c1aaf 100644 --- a/src/soc/qualcomm/qcs405/include/soc/clock.h +++ b/src/soc/qualcomm/qcs405/include/soc/clock.h @@ -69,7 +69,9 @@ u8 _res1[0x2000 - 0x1014]; u32 blsp1_qup1_bcr; u32 blsp1_qup1_spi_apps_cbcr; - u8 _res2[0x2024 - 0x2008]; + u32 blsp1_qup1_i2c_apps_cbcr; + struct qcs405_clock blsp1_qup1_i2c_clk; + u8 _res2[0x2024 - 0x2020]; struct qcs405_clock blsp1_qup1_spi_clk; u8 _res3[0x3008-0x2038]; u32 blsp1_qup2_bcr; @@ -179,10 +181,13 @@ int clock_configure_qspi(uint32_t hz); int clock_reset_bcr(void *bcr_addr, bool reset); void clock_configure_uart(uint32_t hz); +void clock_configure_i2c(uint32_t hz); void clock_configure_spi(int blsp, int qup, uint32_t hz); void clock_enable_uart(void); void clock_disable_uart(void); void clock_enable_spi(int blsp, int qup); void clock_disable_spi(int blsp, int qup); +void clock_enable_i2c(void); +void clock_disable_i2c(void);
#endif // __SOC_QUALCOMM_QCS405_CLOCK_H__
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32545
to look at the new patch set (#3).
Change subject: coreboot: Add i2c clock API for qcs405 ......................................................................
coreboot: Add i2c clock API for qcs405
Add support of i2c clock enable, disable and configure API.
Change-Id: Ia0b42357ac09bf0ab60aad18c44e5ef27fe9dac3 Signed-off-by: Shefali Jain shefjain@codeaurora.org Signed-off-by: Taniya Das tdas@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/include/soc/clock.h 2 files changed, 24 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/32545/3
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32545 )
Change subject: coreboot: Add i2c clock API for qcs405 ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32545 )
Change subject: coreboot: Add i2c clock API for qcs405 ......................................................................
coreboot: Add i2c clock API for qcs405
Add support of i2c clock enable, disable and configure API.
Change-Id: Ia0b42357ac09bf0ab60aad18c44e5ef27fe9dac3 Signed-off-by: Shefali Jain shefjain@codeaurora.org Signed-off-by: Taniya Das tdas@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/32545 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/qualcomm/qcs405/clock.c M src/soc/qualcomm/qcs405/include/soc/clock.h 2 files changed, 24 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/soc/qualcomm/qcs405/clock.c b/src/soc/qualcomm/qcs405/clock.c index 302652b..56824a4 100644 --- a/src/soc/qualcomm/qcs405/clock.c +++ b/src/soc/qualcomm/qcs405/clock.c @@ -246,6 +246,14 @@ clock_configure(spi_clk, spi_cfg, hz, ARRAY_SIZE(spi_cfg)); }
+void clock_configure_i2c(uint32_t hz) +{ + struct qcs405_clock *i2c_clk = + (struct qcs405_clock *)&gcc->blsp1_qup1_i2c_clk; + + clock_configure(i2c_clk, i2c_cfg, hz, ARRAY_SIZE(i2c_cfg)); +} + void clock_enable_uart(void) { clock_enable(&gcc->blsp1_uart2_apps_cbcr); @@ -309,6 +317,16 @@
}
+void clock_enable_i2c(void) +{ + clock_enable(&gcc->blsp1_qup1_i2c_apps_cbcr); +} + +void clock_disable_i2c(void) +{ + clock_disable(&gcc->blsp1_qup1_i2c_apps_cbcr); +} + void clock_init(void) { clock_configure_gpll0(); diff --git a/src/soc/qualcomm/qcs405/include/soc/clock.h b/src/soc/qualcomm/qcs405/include/soc/clock.h index 8638128..55c1aaf 100644 --- a/src/soc/qualcomm/qcs405/include/soc/clock.h +++ b/src/soc/qualcomm/qcs405/include/soc/clock.h @@ -69,7 +69,9 @@ u8 _res1[0x2000 - 0x1014]; u32 blsp1_qup1_bcr; u32 blsp1_qup1_spi_apps_cbcr; - u8 _res2[0x2024 - 0x2008]; + u32 blsp1_qup1_i2c_apps_cbcr; + struct qcs405_clock blsp1_qup1_i2c_clk; + u8 _res2[0x2024 - 0x2020]; struct qcs405_clock blsp1_qup1_spi_clk; u8 _res3[0x3008-0x2038]; u32 blsp1_qup2_bcr; @@ -179,10 +181,13 @@ int clock_configure_qspi(uint32_t hz); int clock_reset_bcr(void *bcr_addr, bool reset); void clock_configure_uart(uint32_t hz); +void clock_configure_i2c(uint32_t hz); void clock_configure_spi(int blsp, int qup, uint32_t hz); void clock_enable_uart(void); void clock_disable_uart(void); void clock_enable_spi(int blsp, int qup); void clock_disable_spi(int blsp, int qup); +void clock_enable_i2c(void); +void clock_disable_i2c(void);
#endif // __SOC_QUALCOMM_QCS405_CLOCK_H__
-
Nitheesh Sekar (Code Review) -
Patrick Georgi (Code Review)