James has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable
If the Management Engine is in an inoperable mode, e.g. if me_cleaner is used, hide the Management Engine Interface device so the OS doesn't try to access it.
Enable the MEI in device trees of Ibex Peak, Cougar Point and Panther Point boards where they have been disabled.
Change-Id: Ie4a35bf5fc196e0a02b7591cdb8633d38f0c7f3e Signed-off-by: James Ye jye836@gmail.com --- M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/x131e/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/packardbell/ms2290/devicetree.cb M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/ibexpeak/me.c 11 files changed, 18 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/39074/1
diff --git a/src/mainboard/lenovo/s230u/devicetree.cb b/src/mainboard/lenovo/s230u/devicetree.cb index b03e2f9..3c0d278 100644 --- a/src/mainboard/lenovo/s230u/devicetree.cb +++ b/src/mainboard/lenovo/s230u/devicetree.cb @@ -54,7 +54,7 @@ register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller - device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb index 808e057..fb2876f 100644 --- a/src/mainboard/lenovo/t410/devicetree.cb +++ b/src/mainboard/lenovo/t410/devicetree.cb @@ -74,7 +74,9 @@
register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
- device pci 16.0 off end # MEI + device pci 16.0 on # MEI + subsystemid 0x17aa 0x215f + end device pci 16.2 on # IDE/SATA subsystemid 0x17aa 0x2161 end diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index 53bd16f..222825b 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -72,7 +72,7 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005"
- device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index c91b04e..314ca43 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -72,7 +72,7 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005"
- device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index ee612cd..7483c46 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -75,7 +75,7 @@ register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller - device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/lenovo/x131e/devicetree.cb b/src/mainboard/lenovo/x131e/devicetree.cb index 2d15d87..510fa9e 100644 --- a/src/mainboard/lenovo/x131e/devicetree.cb +++ b/src/mainboard/lenovo/x131e/devicetree.cb @@ -71,7 +71,7 @@ register "spi_lvscc" = "0x2005"
device pci 14.0 on end # USB 3.0 Controller - device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 5ae1427..7e9d9bb 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -71,7 +71,7 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005"
- device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb index bf1c171..97674d8 100644 --- a/src/mainboard/packardbell/ms2290/devicetree.cb +++ b/src/mainboard/packardbell/ms2290/devicetree.cb @@ -66,7 +66,9 @@ register "alt_gp_smi_en" = "0x0000" register "gen1_dec" = "0x040069"
- device pci 16.0 off end # Management Engine Interface 1 + device pci 16.0 on # Management Engine Interface 1 + subsystemid 0x1025 0x0379 + end device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R, only management boot device pci 16.3 off end # Management Engine KT diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 15f99cd..280dcb0 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -692,6 +692,8 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_ERROR_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: intel_me_hide(dev); break;
@@ -717,9 +719,7 @@ */ break;
- case ME_ERROR_BIOS_PATH: case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; } diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index f13ced9..88558e3 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -681,6 +681,8 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_ERROR_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: intel_me_hide(dev); break;
@@ -721,9 +723,7 @@ */ break;
- case ME_ERROR_BIOS_PATH: case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; } diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 63dff6a..aa1c002 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -577,6 +577,8 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_ERROR_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: intel_me_hide(dev); break;
@@ -595,9 +597,7 @@ */ break;
- case ME_ERROR_BIOS_PATH: case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; }
James has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Ought to be applied to Lynx Point and Broadwell too, but the ME init code is different and I'm not sure what do to about it.
Seems OK with me_cleaner on Sandy Bridge / Cougar Point, both with disable bit and module deletion, but needs more testing.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
IMO, this should be made optional. A Kconfig maybe? Not everybody wants to hide errors.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
(1 comment)
Patch Set 1:
IMO, this should be made optional. A Kconfig maybe? Not everybody wants to hide errors.
Well, not hiding the MEI device results in long waits because mei_me has to time out. I would appreciate if coreboot would log a message about it, at least.
https://review.coreboot.org/c/coreboot/+/39074/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39074/1//COMMIT_MSG@13 PS1, Line 13: Enable the MEI in device trees of Ibex Peak, Cougar Point and Panther I would prefer that this be done on a separate change.
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Patch Set 1:
(1 comment)
Patch Set 1:
IMO, this should be made optional. A Kconfig maybe? Not everybody wants to hide errors.
Well, not hiding the MEI device results in long waits because mei_me has to time out. I would appreciate if coreboot would log a message about it, at least.
BIOS should enable MEI 1 on error and recovery paths so it allows the user to update firmware and take it out of error/recovery condition. Should hide on disable path though.
If mei_me waits too long when ME is in error condition, probably mei_me should be fixed instead.
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
(2 comments)
I hope this change will not be abandoned. My patch for ME Soft Temp Disable depend on it, and I don't want to create duplicating patches.
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me.c:
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... PS1, Line 695: ME_ERROR_BIOS_PATH BIOS shouldn't hide ME device by default on error path (me_cleaner is not the only possible reason of error). Please make it at least a Kconfig option, those who want to hide it will use it.
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me_8.x.c:
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... PS1, Line 684: ME_ERROR_BIOS_PATH Same as in me.c.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1: Code-Review+1
Kconfig option and a message in log would be great
James has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Does the following procedure look OK to everyone?
1. Hide MEI if ME is in error mode AND Kconfig option to hide MEI on error is set. 2. Hide MEI if ME is in alt disable mode, regardless of Kconfig option.
Or would it be better if the Kconfig option applies in both cases?
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Does the following procedure look OK to everyone?
- Hide MEI if ME is in error mode AND Kconfig option to hide MEI on error is set.
- Hide MEI if ME is in alt disable mode, regardless of Kconfig option.
Looks OK to me.
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Hi James. Do you mind if I take over your patch?
James has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Patch Set 1:
Hi James. Do you mind if I take over your patch?
Feel free to.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 1:
Evgeny, do you have a chance to look at this again?
Evgeny Zinoviev has uploaded a new patch set (#2) to the change originally created by James. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable
- Add Kconfig option to hide the Management Engine Interface device so the OS doesn't try to access it, if the Management Engine is in an inoperable mode, e.g. if me_cleaner is used.
- Also hide the MEI if the ME is in Soft Temp Disable mode.
- Enable the MEI in device trees of Ibex Peak, Cougar Point and Panther Point boards where they have been disabled.
Change-Id: Ie4a35bf5fc196e0a02b7591cdb8633d38f0c7f3e Signed-off-by: James Ye jye836@gmail.com Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/x131e/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/packardbell/ms2290/devicetree.cb M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/me.c 13 files changed, 46 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/39074/2
Evgeny Zinoviev has uploaded a new patch set (#3) to the change originally created by James. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable
- Add Kconfig option to hide the Management Engine Interface device so the OS doesn't try to access it, if the Management Engine is in an inoperable mode, e.g. if me_cleaner is used.
- Also hide the MEI if the ME is in Soft Temp Disable mode.
- Enable the MEI in device trees of Ibex Peak, Cougar Point and Panther Point boards where they have been disabled.
Change-Id: Ie4a35bf5fc196e0a02b7591cdb8633d38f0c7f3e Signed-off-by: James Ye jye836@gmail.com Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t410/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/x131e/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/packardbell/ms2290/devicetree.cb M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/me.c 13 files changed, 46 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/39074/3
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me.c:
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... PS1, Line 695: ME_ERROR_BIOS_PATH
BIOS shouldn't hide ME device by default on error path (me_cleaner is not the only possible reason o […]
Done
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... File src/southbridge/intel/bd82x6x/me_8.x.c:
https://review.coreboot.org/c/coreboot/+/39074/1/src/southbridge/intel/bd82x... PS1, Line 684: ME_ERROR_BIOS_PATH
Same as in me.c.
Done
Evgeny Zinoviev has uploaded a new patch set (#4) to the change originally created by James. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable
- Add Kconfig option to hide the Management Engine Interface device so the OS doesn't try to access it, if the Management Engine is in an inoperable mode, e.g. if me_cleaner is used.
- Also hide the MEI if the ME is in Soft Temp Disable mode.
Change-Id: Ie4a35bf5fc196e0a02b7591cdb8633d38f0c7f3e Signed-off-by: James Ye jye836@gmail.com Signed-off-by: Evgeny Zinoviev me@ch1p.io --- M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/me.c 5 files changed, 34 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/39074/4
Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39074/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39074/1//COMMIT_MSG@13 PS1, Line 13: Enable the MEI in device trees of Ibex Peak, Cougar Point and Panther
I would prefer that this be done on a separate change.
Done
Attention is currently required from: Evgeny Zinoviev, James. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 11: Code-Review+2
Attention is currently required from: Evgeny Zinoviev, James. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
Patch Set 11: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39074 )
Change subject: sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable ......................................................................
sb/intel/{bd82x6x,ibexpeak}: hide MEI if ME inoperable
- Add Kconfig option to hide the Management Engine Interface device so the OS doesn't try to access it, if the Management Engine is in an inoperable mode, e.g. if me_cleaner is used.
- Also hide the MEI if the ME is in Soft Temp Disable mode.
Change-Id: Ie4a35bf5fc196e0a02b7591cdb8633d38f0c7f3e Signed-off-by: James Ye jye836@gmail.com Signed-off-by: Evgeny Zinoviev me@ch1p.io Reviewed-on: https://review.coreboot.org/c/coreboot/+/39074 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/bd82x6x/Kconfig M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/ibexpeak/Kconfig M src/southbridge/intel/ibexpeak/me.c 5 files changed, 34 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 21816e5..e3ad885 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -56,4 +56,12 @@ hex default 0x80
+config HIDE_MEI_ON_ERROR + bool "Hide MEI device on error" + default n + help + If you enable this option, the Management Engine Interface + device will be hidden when ME is in an inoperable mode, e.g. + if me_cleaner was used. + endif diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 2adfbd5..fe2a37c 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -254,6 +254,10 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: +#if CONFIG(HIDE_MEI_ON_ERROR) + case ME_ERROR_BIOS_PATH: +#endif intel_me_hide(dev); break;
@@ -279,9 +283,10 @@ */ break;
+#if !CONFIG(HIDE_MEI_ON_ERROR) case ME_ERROR_BIOS_PATH: +#endif case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; } diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index b0226a6..f5a39ec 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -242,6 +242,10 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: +#if CONFIG(HIDE_MEI_ON_ERROR) + case ME_ERROR_BIOS_PATH: +#endif intel_me_hide(dev); break;
@@ -268,9 +272,10 @@ */ break;
+#if !CONFIG(HIDE_MEI_ON_ERROR) case ME_ERROR_BIOS_PATH: +#endif case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; } diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index f172bf1..34ae2f1 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -53,4 +53,12 @@ hex default 0x80
+config HIDE_MEI_ON_ERROR + bool "Hide MEI device on error" + default n + help + If you enable this option, the Management Engine Interface + device will be hidden when ME is in an inoperable mode, e.g. + if me_cleaner was used. + endif diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index 6a45fb4..20b8aac 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -476,6 +476,10 @@
switch (path) { case ME_S3WAKE_BIOS_PATH: + case ME_DISABLE_BIOS_PATH: +#if CONFIG(HIDE_MEI_ON_ERROR) + case ME_ERROR_BIOS_PATH: +#endif intel_me_hide(dev); break;
@@ -494,9 +498,10 @@ */ break;
+#if !CONFIG(HIDE_MEI_ON_ERROR) case ME_ERROR_BIOS_PATH: +#endif case ME_RECOVERY_BIOS_PATH: - case ME_DISABLE_BIOS_PATH: case ME_FIRMWARE_UPDATE_BIOS_PATH: break; }
-
Angel Pons (Code Review) -
Evgeny Zinoviev (Code Review)
-
Felix Singer (Code Review)
-
James (Code Review)
-
Nico Huber (Code Review)
-
Paul Menzel (Code Review)