Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45715 )
Change subject: soc/intel/broadwell/pcie.c: Add some null checks ......................................................................
soc/intel/broadwell/pcie.c: Add some null checks
These are present in Lynx Point.
Change-Id: I381f3cbf5fd18c952622f757135c0bde9ed6ed0d Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/broadwell/pcie.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45715/1
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c index 01ee068..0d41d42 100644 --- a/src/soc/intel/broadwell/pcie.c +++ b/src/soc/intel/broadwell/pcie.c @@ -182,7 +182,7 @@ /* Determine the new devfn for this port */ new_devfn = PCI_DEVFN(PCH_DEV_SLOT_PCIE, pci_func);
- if (dev->path.pci.devfn != new_devfn) { + if (dev && dev->path.pci.devfn != new_devfn) { printk(BIOS_DEBUG, "PCH: PCIe map %02x.%1x -> %02x.%1x\n", PCI_SLOT(dev->path.pci.devfn), @@ -204,6 +204,9 @@ int rp;
dev = rpc.ports[i]; + if (!dev) + continue; + rp = root_port_number(dev);
if (!dev->enabled) {
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45715 )
Change subject: soc/intel/broadwell/pcie.c: Add some null checks ......................................................................
Patch Set 3: Code-Review+1
these checks are useful, but checking that index isn't <0 or >= MAX_NUM_ROOT_PORTS would probably be a good idea too
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45715 )
Change subject: soc/intel/broadwell/pcie.c: Add some null checks ......................................................................
Patch Set 3:
Patch Set 3: Code-Review+1
these checks are useful, but checking that index isn't <0 or >= MAX_NUM_ROOT_PORTS would probably be a good idea too
Yeah, I think these limits are guaranteed by the loops themselves though. I'll see how this would look like once deduplicated.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45715 )
Change subject: soc/intel/broadwell/pcie.c: Add some null checks ......................................................................
Patch Set 3: Code-Review+2
Patch Set 3:
Patch Set 3: Code-Review+1
these checks are useful, but checking that index isn't <0 or >= MAX_NUM_ROOT_PORTS would probably be a good idea too
Yeah, I think these limits are guaranteed by the loops themselves though. I'll see how this would look like once deduplicated.
Being a static function, it's also easier to audit the inputs passed to it. Right now, I can see it's only called from for loops looping from 0 to rpc.num_ports (assuming that's initialized already by this point).
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45715 )
Change subject: soc/intel/broadwell/pcie.c: Add some null checks ......................................................................
soc/intel/broadwell/pcie.c: Add some null checks
These are present in Lynx Point.
Change-Id: I381f3cbf5fd18c952622f757135c0bde9ed6ed0d Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45715 Reviewed-by: Matt DeVillier matt.devillier@gmail.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/broadwell/pcie.c 1 file changed, 4 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, but someone else must approve Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c index 01ee068..0d41d42 100644 --- a/src/soc/intel/broadwell/pcie.c +++ b/src/soc/intel/broadwell/pcie.c @@ -182,7 +182,7 @@ /* Determine the new devfn for this port */ new_devfn = PCI_DEVFN(PCH_DEV_SLOT_PCIE, pci_func);
- if (dev->path.pci.devfn != new_devfn) { + if (dev && dev->path.pci.devfn != new_devfn) { printk(BIOS_DEBUG, "PCH: PCIe map %02x.%1x -> %02x.%1x\n", PCI_SLOT(dev->path.pci.devfn), @@ -204,6 +204,9 @@ int rp;
dev = rpc.ports[i]; + if (!dev) + continue; + rp = root_port_number(dev);
if (!dev->enabled) {
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Nico Huber (Code Review)
-
Tim Wawrzynczak (Code Review)