Change in coreboot[master]: drivers/intel/dptf: Add PCH FIVR enable support under TPCH device

[Tim Wawrzynczak (Code Review)]

Attention is currently required from: Furquan Shaikh, Sumeet R Pawnikar, Patrick Rudolph, Karthik Ramasubramanian.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58141 )

Change subject: drivers/intel/dptf: Add PCH FIVR enable support under TPCH device
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Patch Set 1:

(1 comment)

File src/drivers/intel/dptf/dptf.c:

https://review.coreboot.org/c/coreboot/+/58141/comment/9482bd23_c04f5696 
PS1, Line 308: acpigen_write_method("_STA", 0);
             : 	acpigen_write_if();
             : 	acpigen_emit_byte(LEQUAL_OP);
             : 	acpigen_emit_namestring("\PCHE");
             : 	acpigen_emit_byte(ONE_OP);
             : 	acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON);
             : 	acpigen_write_else();
             : 	acpigen_emit_byte(RETURN_OP);
             : 	acpigen_emit_byte(ZERO_OP);
             : 	acpigen_pop_len();
             : 	acpigen_write_method_end();
I do not see why it is necessary to consult NVS to determine if the mainboard is choosing to enable the TPCH. This is decided at build-time via selecting `DRIVERS_INTEL_DPTF_SUPPORTS_TPCH`.

If `DRIVERS_INTEL_DPTF_SUPPORTS_TPCH` is not selected, this code will never be called and there will not be a TPCH device in the ACPI, hence there will never be a need to return 0 from _STA, and this can be replaced with:

`acpigen_write_STA(ACPI_STATUS_DEVICE_ALL_ON)`