Change in coreboot[master]: Rename ECAM-specific MMCONF Kconfigs

[Shelley Chen (Code Review)]

Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Stefan Reinauer, Kyösti Mälkki, Andrey Petrov, Patrick Rudolph, Nico Huber, Anjaneya "Reddy" Chagam, Johnny Lin, Suresh Bellampalli, Morgan Jang, Michal Motyl, Alexander Couzens, Felix Held, Furquan Shaikh, Angel Pons, Lance Zhao, Jason Glenesk, Martin Roth, Damien Zammit, Lee Leahy, Marshall Dawson, Tim Wawrzynczak, Vanessa Eusebio, Huang Jin.
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57333 )

Change subject: Rename ECAM-specific MMCONF Kconfigs
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Patch Set 8:

(1 comment)

Patchset:

PS5:
> My three questions above are still unanswered. And the parent commit […]

Nico, can you please read the design doc that I wrote up and referenced above (https://review.coreboot.org/c/coreboot/+/57861) and see if you still have concerns regarding the steps that we are taking to implement the non-ECAM PCI config access mechanism?  I've listed out the four steps that we are planning on taking to achieve this.  All the current CLs are WIP and will be modified to reflect the changes in the doc when it is approved.  Please comment on the doc for the things that you disagree with.

specifically regarding your questions:

1. Does QC actually call their mechanism MMCONF(IG)?
This seems to be a kernel/coreboot thing.  QC seems to be using it as well.  See https://review.coreboot.org/c/coreboot/+/57614

Does any other project use the MMCONF term for more than coreboot currently does?
The linux kernel uses the MMConfig term.  See: https://cateee.net/lkddb/web-lkddb/PCI_MMCONFIG.html.  I think that coreboot/linux are using it to refer to the same thing.

What does/should the term MMCONF comprise? Isn't it it about (directly) memory mapping PCI(e) config space? which QC doesn't do, as it seems
MMConfig is referring to the PCIe config space.  QC is using the PCIe space, as you can see in https://review.coreboot.org/c/coreboot/+/57614, for NVMe.  They are just not using  ECAM to access it, which is the reason that we're doing this redesign.