Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31601
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
soc/intel/skylake: Add a new desktop i5 CPU
This patch adds support HB: Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host Bridge/DRAM Registers - 191F IGD: HD Graphics 530 Skylake GT2 - Intel integrated graphics processor https://en.wikichip.org/wiki/intel/hd_graphics/530
This is required to run the Coreboot on the Intel Core i5-6600 (Skylake) decktop processor. It has been tested on ASRock H110M-DVS motherboard.
Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/31601/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 81654bc..ba740fc 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2956,6 +2956,7 @@
/* Intel IGD device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 +#define PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1 0x1912 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B @@ -3029,6 +3030,7 @@ #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 #define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 +#define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f #define PCI_DEVICE_ID_INTEL_KBL_ID_U 0x5904 #define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c #define PCI_DEVICE_ID_INTEL_KBL_ID_H 0x5910 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index da2b25f..124d367 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -128,6 +128,7 @@ PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, PCI_DEVICE_ID_INTEL_AML_GT2_ULX, PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 69c1232..0d21250 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -310,6 +310,7 @@ PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_KBL_ID_S, PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, + PCI_DEVICE_ID_INTEL_SKL_ID_DT, PCI_DEVICE_ID_INTEL_KBL_ID_U, PCI_DEVICE_ID_INTEL_KBL_ID_Y, PCI_DEVICE_ID_INTEL_KBL_ID_H, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index c245523..ae74489 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -52,6 +52,7 @@ { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" }, { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, @@ -95,6 +96,7 @@ const char *name; } igd_table[] = { { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" },
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31601
to look at the new patch set (#2).
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
soc/intel/skylake: Add a new desktop i5 CPU
This patch adds support HB: Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host Bridge/DRAM Registers - 191F IGD: HD Graphics 530 Skylake GT2 - Intel integrated graphics processor https://en.wikichip.org/wiki/intel/hd_graphics/530
This is required to run coreboot on the Intel Core i5-6600 (Skylake) decktop processor. It has been tested on ASRock H110M-DVS motherboard.
Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/31601/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31601 )
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
Patch Set 2: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/31601/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31601/2//COMMIT_MSG@16 PS2, Line 16: decktop desktop
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31601 )
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
Patch Set 2: Code-Review+1
The Intel i7-6700 seems to have the same IDs.
Unrelated, strange that inteltool uses different macro names.
util/inteltool/inteltool.h:#define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D 0x191f /* Skylake (Desktop) */
Hello Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31601
to look at the new patch set (#3).
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
soc/intel/skylake: Add a new desktop i5 CPU
This patch adds support HB: Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host Bridge/DRAM Registers - 191F IGD: HD Graphics 530 Skylake GT2 - Intel integrated graphics processor https://en.wikichip.org/wiki/intel/hd_graphics/530
This is required to run coreboot on the Intel Core i5-6600 (Skylake) desktop processor. It has been tested on ASRock H110M-DVS motherboard.
Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/31601/3
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31601 )
Change subject: soc/intel/skylake: Add a new desktop i5 CPU ......................................................................
Patch Set 3:
(1 comment)
Patch Set 2: Code-Review+1
The Intel i7-6700 seems to have the same IDs.
Unrelated, strange that inteltool uses different macro names.
util/inteltool/inteltool.h:#define PCI_DEVICE_ID_INTEL_CORE_6TH_GEN_D 0x191f /* Skylake (Desktop) */
"0x191f" is deviceID of Host Bridge for Skylake desktop processors:
lspci: 00:00.0 Host bridge [0600]: Intel Corporation Sky Lake Host Bridge/DRAM Registers [8086:191f] (rev 07)
I think the title "Add a new desktop i5 CPU" is wrong. It would be better to rename the commit title
https://review.coreboot.org/#/c/31601/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31601/2//COMMIT_MSG@16 PS2, Line 16: decktop
desktop
Done
Hello Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31601
to look at the new patch set (#4).
Change subject: soc/intel/skylake: Add new Northbridge and IGD IDs ......................................................................
soc/intel/skylake: Add new Northbridge and IGD IDs
This patch adds support 1) Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host Bridge/DRAM Registers - 191F; 2) HD Graphics 530 Skylake GT2 - Intel integrated graphics processor https://en.wikichip.org/wiki/intel/hd_graphics/530.
This is required to run coreboot on the Intel Core i5-6600 (Skylake) desktop processor. It has been tested on ASRock H110M-DVS motherboard.
Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/31601/4
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31601 )
Change subject: soc/intel/skylake: Add new Northbridge and IGD IDs ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31601 )
Change subject: soc/intel/skylake: Add new Northbridge and IGD IDs ......................................................................
soc/intel/skylake: Add new Northbridge and IGD IDs
This patch adds support 1) Intel(R) Xeon(R) E3 - 1200/1500 v5/6th Gen Intel(R) Core(TM) Host Bridge/DRAM Registers - 191F; 2) HD Graphics 530 Skylake GT2 - Intel integrated graphics processor https://en.wikichip.org/wiki/intel/hd_graphics/530.
This is required to run coreboot on the Intel Core i5-6600 (Skylake) desktop processor. It has been tested on ASRock H110M-DVS motherboard.
Change-Id: If47e9ac32813a9f73d3a23f44536f60d1003971d Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31601 Reviewed-by: Patrick Rudolph siro@das-labor.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/skylake/bootblock/report_platform.c 4 files changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Patrick Rudolph: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 45d9c14..4f7f298 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2996,6 +2996,7 @@
/* Intel IGD device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 +#define PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1 0x1912 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B @@ -3069,6 +3070,7 @@ #define PCI_DEVICE_ID_INTEL_SKL_ID_H 0x1910 #define PCI_DEVICE_ID_INTEL_KBL_ID_S 0x590f #define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM 0x1918 +#define PCI_DEVICE_ID_INTEL_SKL_ID_DT 0x191f #define PCI_DEVICE_ID_INTEL_KBL_ID_U 0x5904 #define PCI_DEVICE_ID_INTEL_KBL_ID_Y 0x590c #define PCI_DEVICE_ID_INTEL_KBL_ID_H 0x5910 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index bc2bef1..5d3b4a1 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -129,6 +129,7 @@ PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, PCI_DEVICE_ID_INTEL_AML_GT2_ULX, PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index abef64a..f9782aa 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -310,6 +310,7 @@ PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, PCI_DEVICE_ID_INTEL_KBL_ID_S, PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, + PCI_DEVICE_ID_INTEL_SKL_ID_DT, PCI_DEVICE_ID_INTEL_KBL_ID_U, PCI_DEVICE_ID_INTEL_KBL_ID_Y, PCI_DEVICE_ID_INTEL_KBL_ID_H, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 7f7e685..b30f77a 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -52,6 +52,7 @@ { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H, "Skylake-H" }, { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" }, + { PCI_DEVICE_ID_INTEL_SKL_ID_DT, "Skylake-DT" }, { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" }, { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"}, { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" }, @@ -95,6 +96,7 @@ const char *name; } igd_table[] = { { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" },
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Angel Pons (Code Review) -
Maxim Polyakov (Code Review)
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Patrick Georgi (Code Review)
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Patrick Rudolph (Code Review)
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Paul Menzel (Code Review)