Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: merge harrykipper's changes ......................................................................
mb/51nb/x210: merge harrykipper's changes
merge in changes from https://github.com/harrykipper/coreboot at commit 709cf02. Split out macOS-specific changes into subsequent commit.
Signed-off-by: Matt DeVillier matt.devillier@puri.sm Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50 --- M src/mainboard/51nb/x210/Kconfig M src/mainboard/51nb/x210/Makefile.inc M src/mainboard/51nb/x210/acpi/battery.asl M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/51nb/x210/dsdt.asl A src/mainboard/51nb/x210/gma-mainboard.ads A src/mainboard/51nb/x210/ramstage.c 7 files changed, 83 insertions(+), 22 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/39106/1
diff --git a/src/mainboard/51nb/x210/Kconfig b/src/mainboard/51nb/x210/Kconfig index 072cf42..1a02cc5 100644 --- a/src/mainboard/51nb/x210/Kconfig +++ b/src/mainboard/51nb/x210/Kconfig @@ -2,16 +2,15 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - select SYSTEM_TYPE_LAPTOP select BOARD_ROMSIZE_KB_8192 + select EC_51NB_NPCE985LA0DX select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES - select SOC_INTEL_KABYLAKE + select MAINBOARD_HAS_LIBGFXINIT select SOC_INTEL_COMMON_BLOCK_HDA_VERB - select NO_POST - select MAINBOARD_USES_FSP2_0 + select SOC_INTEL_KABYLAKE select SPD_READ_BY_WORD - select EC_51NB_NPCE985LA0DX + select SYSTEM_TYPE_LAPTOP
config MAINBOARD_VENDOR string @@ -53,15 +52,11 @@ int default 512
-config CPU_MICROCODE_CBFS_LEN - hex - default 0x18000 - -config CPU_MICROCODE_CBFS_LOC - hex - default 0xFFE115A0 - config FMDFILE string default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" + +config NO_POST + default y + endif diff --git a/src/mainboard/51nb/x210/Makefile.inc b/src/mainboard/51nb/x210/Makefile.inc index f8136e0..c3f2ea9 100644 --- a/src/mainboard/51nb/x210/Makefile.inc +++ b/src/mainboard/51nb/x210/Makefile.inc @@ -14,3 +14,4 @@ ##
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/51nb/x210/acpi/battery.asl b/src/mainboard/51nb/x210/acpi/battery.asl index 9a3a361..6689c83 100644 --- a/src/mainboard/51nb/x210/acpi/battery.asl +++ b/src/mainboard/51nb/x210/acpi/battery.asl @@ -50,16 +50,16 @@ Method (_BIF, 0, Serialized) { /* Design Capacity */ - Store (DGCP, Index (PBIF, 1)) + Store (DGCP * 10000 / DGVO, Index (PBIF, 1))
/* Last Full Charge Capacity */ - Store (FLCP, Index (PBIF, 2)) + Store (FLCP * 10000 / DGVO, Index (PBIF, 2))
/* Design Voltage */ Store (DGVO, Index (PBIF, 4))
/* Design Capacity of Warning */ - Store (BDW, Index (PBIF, 5)) + Store (BDW * 10000 / DGVO, Index (PBIF, 5))
/* Design Capacity of Low */ Store (BDL, Index (PBIF, 6)) @@ -93,7 +93,7 @@ /* * 2: BATTERY REMAINING CAPACITY */ - Store (BRC, Index (PBST, 2)) + Store (BRC * 10000 / DGVO, Index (PBST, 2))
/* * 3: BATTERY PRESENT VOLTAGE diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index cc95aa0..162fa33 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -1,5 +1,12 @@ chip soc/intel/skylake
+ # Enable Panel as eDP and configure power delays + register "gpu_pp_up_delay_ms" = "210" # T3 + register "gpu_pp_down_delay_ms" = "500" # T10 + register "gpu_pp_cycle_delay_ms" = "5000" # T12 + register "gpu_pp_backlight_on_delay_ms" = "1" # T7 + register "gpu_pp_backlight_off_delay_ms" = "200" # T9 + # Enable deep Sx states register "deep_s3_enable_ac" = "1" register "deep_s3_enable_dc" = "1" @@ -148,6 +155,7 @@ .dc_loadline = 310, }"
+ # Enable CLKRUN logic to stop the PCI clocks when idle register "PmConfigPciClockRun" = "1"
# Enable Root Ports 3, 4 and 9 @@ -164,17 +172,19 @@ register "PcieRpClkSrcNumber[3]" = "1" register "PcieRpAdvancedErrorReporting[3]" = "1" register "PcieRpLtrEnable[3]" = "1" - register "PcieRpHotPlug[3]" = "1"
register "PcieRpEnable[8]" = "1" # NVMe controller - register "PcieRpClkReqSupport[8]" = "0" - register "PcieRpClkReqNumber[8]" = "2" - register "PcieRpClkSrcNumber[8]" = "2" + register "PcieRpClkReqSupport[8]" = "1" + register "PcieRpClkReqNumber[8]" = "4" + register "PcieRpClkSrcNumber[8]" = "4" register "PcieRpAdvancedErrorReporting[8]" = "1" register "PcieRpLtrEnable[8]" = "1"
register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # Type-A Port (left) register "usb2_ports[1]" = "USB2_PORT_MID(OC1)" # Type-A Port (left) + register "usb2_ports[2]" = "USB2_PORT_FLEX(OC1)" # FPR + register "usb2_ports[3]" = "USB2_PORT_FLEX(OC1)" # SD + register "usb2_ports[4]" = "USB2_PORT_FLEX(OC1)" # INT register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # Type-A Port (right) register "usb2_ports[6]" = "USB2_PORT_FLEX(OC2)" # webcam register "usb2_ports[7]" = "USB2_PORT_FLEX(OC2)" # WiFi PCIe port USB diff --git a/src/mainboard/51nb/x210/dsdt.asl b/src/mainboard/51nb/x210/dsdt.asl index a8a693a..dac04f2 100644 --- a/src/mainboard/51nb/x210/dsdt.asl +++ b/src/mainboard/51nb/x210/dsdt.asl @@ -44,7 +44,7 @@ }
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/51nb/x210/gma-mainboard.ads b/src/mainboard/51nb/x210/gma-mainboard.ads new file mode 100644 index 0000000..8a72a31 --- /dev/null +++ b/src/mainboard/51nb/x210/gma-mainboard.ads @@ -0,0 +1,30 @@ +-- +-- This file is part of the coreboot project. +-- +-- This program is free software; you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation; either version 2 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + HDMI1, + Analog, + Internal, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/51nb/x210/ramstage.c b/src/mainboard/51nb/x210/ramstage.c new file mode 100644 index 0000000..7888c39 --- /dev/null +++ b/src/mainboard/51nb/x210/ramstage.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corporation + * Copyright (C) 2015-2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/ramstage.h> +#include "gpio.h" + +void mainboard_silicon_init_params(FSP_SIL_UPD *params) +{ + /* Configure pads prior to SiliconInit() in case there's any + * dependencies during hardware initialization. */ + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); +}
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 8:
This change is ready for review.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 8: Code-Review+1
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 9: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39106/9//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39106/9//COMMIT_MSG@12 PS9, Line 12: internal eDP
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... File src/mainboard/51nb/x210/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... PS9, Line 26: Internal This should now be eDP
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... PS9, Line 27: others Please capitalize "Others"
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39106
to look at the new patch set (#10).
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
mb/51nb/x210: add libgfxinit support
Derived from x210_test branch of HarryKipper's repo: https://github.com/harrykipper/coreboot
Test: build/boot x210, test eDP, MiniDP, VGA outputs
Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/51nb/x210/Kconfig M src/mainboard/51nb/x210/Makefile.inc M src/mainboard/51nb/x210/devicetree.cb A src/mainboard/51nb/x210/gma-mainboard.ads 4 files changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/39106/10
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 10:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39106/9//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39106/9//COMMIT_MSG@12 PS9, Line 12: internal
eDP
Done
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... File src/mainboard/51nb/x210/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... PS9, Line 26: Internal
This should now be eDP
Done
https://review.coreboot.org/c/coreboot/+/39106/9/src/mainboard/51nb/x210/gma... PS9, Line 27: others
Please capitalize "Others"
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 11: Code-Review+2
Might need a rebase
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39106
to look at the new patch set (#13).
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
mb/51nb/x210: add libgfxinit support
Derived from x210_test branch of HarryKipper's repo: https://github.com/harrykipper/coreboot
Test: build/boot x210, test eDP, MiniDP, VGA outputs
Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/51nb/x210/Kconfig M src/mainboard/51nb/x210/Makefile.inc M src/mainboard/51nb/x210/devicetree.cb A src/mainboard/51nb/x210/gma-mainboard.ads 4 files changed, 27 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/39106/13
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 13: Code-Review+2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
Patch Set 13: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39106 )
Change subject: mb/51nb/x210: add libgfxinit support ......................................................................
mb/51nb/x210: add libgfxinit support
Derived from x210_test branch of HarryKipper's repo: https://github.com/harrykipper/coreboot
Test: build/boot x210, test eDP, MiniDP, VGA outputs
Change-Id: Ie2b79b236a458ebd243c992d6e615e41930eeb50 Signed-off-by: Matt DeVillier matt.devillier@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39106 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/51nb/x210/Kconfig M src/mainboard/51nb/x210/Makefile.inc M src/mainboard/51nb/x210/devicetree.cb A src/mainboard/51nb/x210/gma-mainboard.ads 4 files changed, 27 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/51nb/x210/Kconfig b/src/mainboard/51nb/x210/Kconfig index 70b3da8..44c0f862 100644 --- a/src/mainboard/51nb/x210/Kconfig +++ b/src/mainboard/51nb/x210/Kconfig @@ -6,6 +6,7 @@ select EC_51NB_NPCE985LA0DX select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select MAINBOARD_HAS_LIBGFXINIT select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SOC_INTEL_KABYLAKE select SPD_READ_BY_WORD diff --git a/src/mainboard/51nb/x210/Makefile.inc b/src/mainboard/51nb/x210/Makefile.inc index 6555e99..9121ccf 100644 --- a/src/mainboard/51nb/x210/Makefile.inc +++ b/src/mainboard/51nb/x210/Makefile.inc @@ -2,3 +2,4 @@ # This file is part of the coreboot project.
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index 7ee3b2c..6bfbe1d 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -1,5 +1,12 @@ chip soc/intel/skylake
+ # Enable Panel as eDP and configure power delays + register "gpu_pp_up_delay_ms" = "210" # T3 + register "gpu_pp_down_delay_ms" = "500" # T10 + register "gpu_pp_cycle_delay_ms" = "5000" # T12 + register "gpu_pp_backlight_on_delay_ms" = "1" # T7 + register "gpu_pp_backlight_off_delay_ms" = "200" # T9 + # Enable deep Sx states register "deep_s3_enable_ac" = "1" register "deep_s3_enable_dc" = "1" diff --git a/src/mainboard/51nb/x210/gma-mainboard.ads b/src/mainboard/51nb/x210/gma-mainboard.ads new file mode 100644 index 0000000..f012560 --- /dev/null +++ b/src/mainboard/51nb/x210/gma-mainboard.ads @@ -0,0 +1,18 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later +-- This file is part of the coreboot project. + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP1, + DP2, + eDP, + Others => Disabled); + +end GMA.Mainboard;
-
Angel Pons (Code Review) -
Felix Held (Code Review)
-
Matt DeVillier (Code Review)
-
Patrick Georgi (Code Review)