Change in ...coreboot[master]: src/drivers/intel/fsp1_1: Configure UART after memory init - coreboot-gerrit

4 Apr 2019


      Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28464 )
Change subject: src/drivers/intel/fsp1_1: Configure UART after memory init
......................................................................
Patch Set 2:
...
Patch Set 2:
...
Patch Set 2:
Opened bug report at https://github.com/IntelFsp/FSP/issues/15
Intel will not only update Braswell FSP anymore, only for security issues.
Does it make sense implementing this patch for now? (Can be removed when new FSP contains fix for this.
Since I feel the same, I'm leaving my +2. Hope other developers will take Your reasoning into consideration and merge the patch.
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/28464
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibb6c9e4153b3de58791b211c7f4241be3bceae9d
Gerrit-Change-Number: 28464
Gerrit-PatchSet: 2
Gerrit-Owner: Frans Hendriks fhendriks@eltan.com
Gerrit-Reviewer: David Hendricks david.hendricks@gmail.com
Gerrit-Reviewer: Frans Hendriks fhendriks@eltan.com
Gerrit-Reviewer: Hannah Williams hannah.williams@intel.com
Gerrit-Reviewer: Michał Żygowski michal.zygowski@3mdeb.com
Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com
Gerrit-CC: Patrick Rudolph siro@das-labor.org
Gerrit-Comment-Date: Thu, 04 Apr 2019 08:50:51 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: No
Gerrit-MessageType: comment