Wim Vervoorn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Add support for 2nd EC UART ......................................................................
mb/facebook/monolith: Add support for 2nd EC UART
Enable the 2nd EC UART at 0x2f8.
BUG=N/A TEST=tested on facebook monolith
Change-Id: I36e652e66c66eeb770a5a5d987bb57c7eaa11382 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/mainboard/facebook/monolith/Kconfig M src/mainboard/facebook/monolith/acpi/superio.asl M src/mainboard/facebook/monolith/com_init.c 3 files changed, 33 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/38749/1
diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index 0ae704d..203f8a5 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -11,6 +11,7 @@ select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_GBE_REGION select INTEL_GMA_HAVE_VBT + select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
config CBFS_SIZE hex "CBFS_SIZE" diff --git a/src/mainboard/facebook/monolith/acpi/superio.asl b/src/mainboard/facebook/monolith/acpi/superio.asl index 0f5790d..537d9f8 100644 --- a/src/mainboard/facebook/monolith/acpi/superio.asl +++ b/src/mainboard/facebook/monolith/acpi/superio.asl @@ -43,3 +43,28 @@ EndDependentFn () }) } + +Device (COM2) { + Name (_HID, EISAID ("PNP0501")) + Name (_UID, 2) + + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + FixedIO (0x02F8, 0x08) + IRQNoFlags () {3} + }) + + Name (_PRS, ResourceTemplate () + { + StartDependentFn (0, 0) { + FixedIO (0x02F8, 0x08) + IRQNoFlags () {3} + } + EndDependentFn () + }) +} diff --git a/src/mainboard/facebook/monolith/com_init.c b/src/mainboard/facebook/monolith/com_init.c index f19aba3..d2519fa 100644 --- a/src/mainboard/facebook/monolith/com_init.c +++ b/src/mainboard/facebook/monolith/com_init.c @@ -19,11 +19,14 @@ #include <device/pnp_ops.h> #include "onboard.h"
-#define SERIAL_DEV PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ +#define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ +#define SERIAL_DEV2 PNP_DEV(ITE8528_CMD_PORT, 2) /* ITE8528 UART2 */
void bootblock_mainboard_early_init(void) { - /* Enable the serial port inside the EC */ - pnp_set_logical_device(SERIAL_DEV); - pnp_set_enable(SERIAL_DEV, 1); + /* Enable the serial ports inside the EC */ + pnp_set_logical_device(SERIAL_DEV1); + pnp_set_enable(SERIAL_DEV1, 1); + pnp_set_logical_device(SERIAL_DEV2); + pnp_set_enable(SERIAL_DEV2, 1); }
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Add support for 2nd EC UART ......................................................................
Patch Set 1: Code-Review+2
Frans Hendriks has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Add support for 2nd EC UART ......................................................................
Removed Code-Review+2 by Frans Hendriks fhendriks@eltan.com
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Add support for 2nd EC UART ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38749/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38749/1//COMMIT_MSG@7 PS1, Line 7: mb/facebook/monolith: Add support for 2nd EC UART Change title into Enable 2nd EC UART
Hello Frans Hendriks, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38749
to look at the new patch set (#2).
Change subject: mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8 ......................................................................
mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8
BUG=N/A TEST=tested on facebook monolith
Change-Id: I36e652e66c66eeb770a5a5d987bb57c7eaa11382 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com --- M src/mainboard/facebook/monolith/Kconfig M src/mainboard/facebook/monolith/acpi/superio.asl M src/mainboard/facebook/monolith/com_init.c 3 files changed, 33 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/38749/2
Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38749/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38749/1//COMMIT_MSG@7 PS1, Line 7: mb/facebook/monolith: Add support for 2nd EC UART
Change title into Enable 2nd EC UART
Done
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8 ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38749 )
Change subject: mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8 ......................................................................
mb/facebook/monolith: Enable the 2nd EC UART at 0x2f8
BUG=N/A TEST=tested on facebook monolith
Change-Id: I36e652e66c66eeb770a5a5d987bb57c7eaa11382 Signed-off-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38749 Reviewed-by: Frans Hendriks fhendriks@eltan.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/facebook/monolith/Kconfig M src/mainboard/facebook/monolith/acpi/superio.asl M src/mainboard/facebook/monolith/com_init.c 3 files changed, 33 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Frans Hendriks: Looks good to me, approved
diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index 0ae704d..203f8a5 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -11,6 +11,7 @@ select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_GBE_REGION select INTEL_GMA_HAVE_VBT + select SOC_INTEL_COMMON_BLOCK_LPC_COMB_ENABLE
config CBFS_SIZE hex "CBFS_SIZE" diff --git a/src/mainboard/facebook/monolith/acpi/superio.asl b/src/mainboard/facebook/monolith/acpi/superio.asl index 0f5790d..537d9f8 100644 --- a/src/mainboard/facebook/monolith/acpi/superio.asl +++ b/src/mainboard/facebook/monolith/acpi/superio.asl @@ -43,3 +43,28 @@ EndDependentFn () }) } + +Device (COM2) { + Name (_HID, EISAID ("PNP0501")) + Name (_UID, 2) + + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () + { + FixedIO (0x02F8, 0x08) + IRQNoFlags () {3} + }) + + Name (_PRS, ResourceTemplate () + { + StartDependentFn (0, 0) { + FixedIO (0x02F8, 0x08) + IRQNoFlags () {3} + } + EndDependentFn () + }) +} diff --git a/src/mainboard/facebook/monolith/com_init.c b/src/mainboard/facebook/monolith/com_init.c index f19aba3..d2519fa 100644 --- a/src/mainboard/facebook/monolith/com_init.c +++ b/src/mainboard/facebook/monolith/com_init.c @@ -19,11 +19,14 @@ #include <device/pnp_ops.h> #include "onboard.h"
-#define SERIAL_DEV PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ +#define SERIAL_DEV1 PNP_DEV(ITE8528_CMD_PORT, 1) /* ITE8528 UART1 */ +#define SERIAL_DEV2 PNP_DEV(ITE8528_CMD_PORT, 2) /* ITE8528 UART2 */
void bootblock_mainboard_early_init(void) { - /* Enable the serial port inside the EC */ - pnp_set_logical_device(SERIAL_DEV); - pnp_set_enable(SERIAL_DEV, 1); + /* Enable the serial ports inside the EC */ + pnp_set_logical_device(SERIAL_DEV1); + pnp_set_enable(SERIAL_DEV1, 1); + pnp_set_logical_device(SERIAL_DEV2); + pnp_set_enable(SERIAL_DEV2, 1); }
-
Frans Hendriks (Code Review) -
Patrick Georgi (Code Review)
-
Wim Vervoorn (Code Review)