Hello ashk@codeaurora.org,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to review the following change.
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: ashk ashk@codeaurora.org --- M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm 3 files changed, 229 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/1
diff --git a/util/qualcomm/scripts/cmm/debug_cb_common.cmm b/util/qualcomm/scripts/cmm/debug_cb_common.cmm index 5959ee1..cc3dd38 100644 --- a/util/qualcomm/scripts/cmm/debug_cb_common.cmm +++ b/util/qualcomm/scripts/cmm/debug_cb_common.cmm @@ -163,22 +163,28 @@ enter )
+ +;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG + ; go &QCLEntryAddr ; wait !run() -; + ; if &QCLStage ; ( -; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf" + ; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear -; +; d.load \snowcone\builds792\PROD\BOOT.XF.3.1-00315-SC7180LCB-1\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll +; else +; d.load \snowcone\builds792\PROD\BOOT.XF.3.1-00315-SC7180LCB-1\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll + + ; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage" ; print %String "Press enter to go to next stage" ; enter ; )
+;;;; END OF QCLIB COMMENTED OUT CODE + go &RAMEntryAddr wait !run()
@@ -193,26 +199,6 @@ print %String "Press enter to go to next stage" enter ) - -; BL31 disabled for now -; Next block of code commented out -; go &BL31EntryAddr -; wait !run() -; -; if &BL31Stage -; ( -; &imgpath="build\bl31.elf" -; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode -; y.spath.srd 3rdparty/arm-trusted-firmware -; print %String "Now the control is in BL31, press enter after debugging to go to next stage" -; print %String "Press enter to go to next stage" -; enter -; ) -; End of commented out code block: bl31 - go &DCEntryAddr wait !run()
@@ -220,36 +206,17 @@ ( &imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf" symbol.sourcepath.setbasedir &srcpath\payloads + y.spath.srd payloads\external\depthcharge\depthcharge\src if (&RAMLoad) d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath else d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode - b.d /all - b.set main - b.set halt - b.set &KernelEntryAddr ; kernel entry point - y.spath.srd + payloads/external/depthcharge/depthcharge - y.spath.srd + 3rdparty\vboot_reference - d.dump &RamConsoleAddr /spotlight - &CBTablePtr=Register(X0) - Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400 - print %String "Now the control is in Depthcharge, press enter after debugging to run free" - ;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel" - print %String "Press enter when done debugging Depthcharge" - enter + print %String "Now the control is in depthcharge, end of script" + d.l + b.s main + ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel() + ;y.spath.srd 3rdparty\vboot\firmware )
-; go &KernelEntryAddr -; wait !run() -; -; if &KernelSyms -; ( -; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:" -; print %String "vmlinux needs to be copied from ChromiumOS build tree" -; print %String "msm-4.4 needs to be symbolic link to kernel source tree" -; d.load.elf vmlinux /strippart "msm-4.4" /nocode -; y.spath.srd msm-4.4 -; print %String "This script now concludes at kernel entry point" -; )
enddo diff --git a/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm new file mode 100644 index 0000000..276bf45 --- /dev/null +++ b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm @@ -0,0 +1,158 @@ +;============================================================================ +;## +;## This file is part of the coreboot project. +;## +;## Copyright (C) 2019, The Linux Foundation. All rights reserved. +;## +;## This program is free software; you can redistribute it and/or modify +;## it under the terms of the GNU General Public License version 2 and +;## only version 2 as published by the Free Software Foundation. +;## +;## This program is distributed in the hope that it will be useful, +;## but WITHOUT ANY WARRANTY; without even the implied warranty of +;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;## GNU General Public License for more details. +;## +;============================================================================ +; Name: +; debug_cb_trogdor.cmm +; +; Description: +; Debug coreboot trogdor front-end +;============================================================================ + +;============================================================================ +; CMM script variables +;============================================================================ + +LOCAL &TargetPkg + +GLOBAL &BBEntryAddr // Bootblock Entry +GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec +GLOBAL &VEREntryAddr // Verstage Entry +GLOBAL &ROMEntryAddr // Romstage Entry +GLOBAL &QCLEntryAddr // QCLstage Entry +GLOBAL &RAMEntryAddr // Ramstage Entry +GLOBAL &BL31EntryAddr // BL31 Entry +GLOBAL &DCEntryAddr // Depthcharge Entry +GLOBAL &KernelEntryAddr // Kernel Entry + +GLOBAL &PreRamConsoleAddr +GLOBAL &RamConsoleAddr +GLOBAL &PreRamCbfsCache +GLOBAL &VBoot2Work +GLOBAL &Stack +GLOBAL &Ttb +GLOBAL &Timestamp +GLOBAL &CbmemTop +GLOBAL &PostRamCbfsCache + +GLOBAL &CBTablePtr +GLOBAL &debug +;============================================================================ + +;--------------------------------------------------- +; Entry point +;--------------------------------------------------- +ENTRY &ImageName + + // Later these can be parameterized + &TargetPkg="trogdorPkg" + + // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld + &BBEntryAddr=0x14815000 + &VEREntryAddr=0x14680000 + &ROMEntryAddr=0x14680000 + &QCLEntryAddr=0x14881950 + &RAMEntryAddr=0x9F860000 + &BL31EntryAddr=0x06820000 + &DCEntryAddr=0xF1000000 + &KernelEntryAddr=0xD0000000 + + &PreRamConsoleAddr=0x14830800 + &VBoot2Work=0x1482E000 + &Stack=0x14847000 + &Ttb=0x14839000 + &Timestamp=0x14838800 + &PreRamCbfsCache=0x1481F000 + &CbmemTop=0x280000000 + &PostRamCbfsCache=0x9F800000 + // End of memlayout.ld settings + + // Common commands irrespective of &Mode + PATH + &CwDir=os.pwd() + PATH + &CwDir + + // position at top of coreboot tree + // find depth count for source loading + cd ........ + &srcpath=os.pwd() + + +;--------------------------------------------------- +; Setup area and log +;--------------------------------------------------- + area.clear + area.reset + area.create CB_Logs 1000. 8192. + area.select CB_Logs + + area.view CB_Logs + + PRINT %String "Source Path: &srcpath" + + symbol.sourcepath.setbasedir &srcpath\src + + // Make parsing simple, upper-case parameters + &ImageName=STRING.UPR("&ImageName") + IF (STR.CP("&ImageName","DEBUG,*")) + ( + &debug="DEBUG" + ) + ELSE + ( + &debug="" + ) + &ImageName=STR.CUT("&ImageName",6) + IF "&debug"=="" + ( + PRINT "SPI_RAM LOAD" + &ImageName=STRING.UPR("&ImageName") + IF "&ImageName"=="" + ( + &ImageName="RAM,BB" //for RAM load Bootblock only and jump till DC + ) + PRINT "&ImageName" + ) + ELSE + ( + if (STR.CP("&debug","DEBUG")) + ( + PRINT "DEBUG" + &ImageName=STRING.UPR("&ImageName") + IF "&ImageName"=="" + ( + &ImageName="RAM,ALL" //for RAM loading all the images + ) + PRINT "&ImageName" + ) + ) + + sys.d + sys.up + b.d + y.reset + D.S EZAXI:0xC260208 %LE %Long 0x80000000 + + b.s 0x148e7000 /o + go + WAIT !STATE.RUN() + + b.s 0x14815000 /o + go + WAIT !STATE.RUN() + + DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName + + enddo diff --git a/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm b/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm new file mode 100644 index 0000000..9205d67 --- /dev/null +++ b/util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm @@ -0,0 +1,53 @@ +sys.d +sys.up +b.d +y.reset + +d.load.elf \ashk-linux\workspace\ashk\pbl_script\FBC_validation\APPS_PBL.elf + +b.s sec_ctrl_drv_ioctl\273+0xC /P /CMD "r.s x6 0x12345678" /resume +b.s pbl_recoverable_error_handler /o +b.s pbl_non_recoverable_error_handler /o + +snoop.PC on + +b.s 0x148e7000 /o +go +WAIT !STATE.RUN() + +b.s 0x14815000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14680000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14680000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x14881950 /o +go +WAIT !STATE.RUN() + +d.load \ashk-linux\workspace\ashk\test_qclib_8_7\boot.xf.3.1.test_qclib_8_7\boot_images\Build\Rennell_qclib\DEBUG_CLANG60LINUX\AARCH64\QcomPkg\QCLib\QcLibCommon\DEBUG\QcLib.dll +do \ashk-linux\workspace\ashk\test_qclib_8_7\boot.xf.3.1.test_qclib_8_7\boot_images\QcomPkg\Tools\qclib\qclib_rennell_only_stub_coreboot.cmm + +b.d +b.s 0x9f860000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0x80c00000 /o +go +WAIT !STATE.RUN() + +b.d +b.s 0xF1000000 /o +go +WAIT !STATE.RUN()
Hello ashk@codeaurora.org, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to look at the new patch set (#2).
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: ashk ashk@codeaurora.org --- M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm 3 files changed, 228 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@2 PS5, Line 2: ashk Please use the full name.
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@8 PS5, Line 8: util: Add T32 scripts for full boot chain for Qualcomm
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@10 PS5, Line 10: ashk Please use the full name.
ashk@codeaurora.org has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@2 PS5, Line 2: ashk
Please use the full name.
Sure.Will use my full name and submit again.
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@8 PS5, Line 8:
util: Add T32 scripts for full boot chain for Qualcomm
Will modify the commit message as mentioned in the review comment
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@10 PS5, Line 10: ashk
Please use the full name.
Ack
Hello ashk@codeaurora.org, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to look at the new patch set (#6).
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org --- M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm 3 files changed, 228 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/6
Hello ashk@codeaurora.org, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to look at the new patch set (#7).
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org --- M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/debug_chroot_common.cmm A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm A util/qualcomm/scripts/cmm/pbl_to_depthcharge.cmm 5 files changed, 602 insertions(+), 51 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/7
mturney mturney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@2 PS5, Line 2: ashk
Sure.Will use my full name and submit again.
Done
https://review.coreboot.org/c/coreboot/+/35505/5//COMMIT_MSG@10 PS5, Line 10: ashk
Ack
Done
Hello ashk@codeaurora.org, Ravi kumar, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to look at the new patch set (#14).
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org --- D util/qualcomm/scripts/cmm/clear_bss.cmm M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/debug_chroot_common.cmm A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm D util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm 6 files changed, 545 insertions(+), 82 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/14
Ravi kumar has uploaded a new patch set (#15) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org --- D util/qualcomm/scripts/cmm/clear_bss.cmm M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/debug_chroot_common.cmm A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm D util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm 6 files changed, 503 insertions(+), 109 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/15
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
Patch Set 32: Code-Review+2
Hello Julius Werner, ashk@codeaurora.org, Ravi kumar, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35505
to look at the new patch set (#37).
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org --- D util/qualcomm/scripts/cmm/clear_bss.cmm M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/debug_chroot_common.cmm A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm D util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm 6 files changed, 503 insertions(+), 109 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/35505/37
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar ashk@codeaurora.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/35505 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- D util/qualcomm/scripts/cmm/clear_bss.cmm M util/qualcomm/scripts/cmm/debug_cb_common.cmm A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm A util/qualcomm/scripts/cmm/debug_chroot_common.cmm A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm D util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm 6 files changed, 503 insertions(+), 109 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/util/qualcomm/scripts/cmm/clear_bss.cmm b/util/qualcomm/scripts/cmm/clear_bss.cmm deleted file mode 100755 index 16eaac7..0000000 --- a/util/qualcomm/scripts/cmm/clear_bss.cmm +++ /dev/null @@ -1,16 +0,0 @@ -d.a 0x80000000 mov x0,#0x8c -d.a 0x80000004 lsl x0, x0, #0x14 -d.a 0x80000008 mov x1,#0x18 -d.a 0x8000000c lsl x1,x1, #0x10 -d.a 0x80000010 mov x2,#0x0 -d.a 0x80000014 mov x3,#0x80 -d.a 0x80000018 lsl x3, x3, #0x18 -d.a 0x8000001c add x3, x3, #0x14 -d.a 0x80000020 str x2,[x0] -d.a 0x80000024 sub x1, x1, #0x8 -d.a 0x80000028 add x0, x0, #0x8 -d.a 0x8000002c cmp x1,0x0 -d.a 0x80000030 b.ne 0x20 -d.a 0x80000034 b 0x34 -r.s pc 0x80000000 -go diff --git a/util/qualcomm/scripts/cmm/debug_cb_common.cmm b/util/qualcomm/scripts/cmm/debug_cb_common.cmm index 5959ee1..bf90575 100644 --- a/util/qualcomm/scripts/cmm/debug_cb_common.cmm +++ b/util/qualcomm/scripts/cmm/debug_cb_common.cmm @@ -33,8 +33,6 @@ LOCAL &BL31Stage // BL31 Stage stop? LOCAL &DCStage // Depthcharge Stage stop?
-LOCAL &KernelSyms // Load Kernel Symbols? - LOCAL &RAMLoad // T32 Load Code?
;============================================================================ @@ -45,10 +43,10 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
// Parse for RAMLoad first - if (STR.CP("&ImageName","RAM,*")) + if (STR.CP("&ImageName","LOAD,*")) ( &RAMLoad=TRUE() - &ImageName=STR.CUT("&ImageName",4) + &ImageName=STR.CUT("&ImageName",5) ) else &RAMLoad=FALSE() @@ -63,7 +61,6 @@ &RAMStage=TRUE() ;&BL31Stage=TRUE() &DCStage=TRUE() - &KernelSyms=STRING.CP("&ImageName", "*KERNEL*") ) else ( @@ -72,14 +69,12 @@ &ROMStage=STRING.CP("&ImageName","*ROM*") &QCLStage=STRING.CP("&ImageName","*QCL*") &RAMStage=STRING.CP("&ImageName","*RAM*") - &BL31Stage=STRING.CP("&ImageName","*BL31*") + ;&BL31Stage=STRING.CP("&ImageName","*BL31*") &DCStage=STRING.CP("&ImageName","*DC*") - &KernelSyms=STRING.CP("&ImageName", "*KERNEL*") )
PRINT %String "Debug Script: debug_cb_common.cmm" PRINT %String "Images to debug: &ImageName" - PRINT %String "Loading Kernel Symbols: &KernelSyms" PRINT %String "RAMLoad Requested: &RAMLoad" PRINT %String "BootBlock Entry Addr: &BBEntryAddr" PRINT %String "VerStage Entry Addr: &VEREntryAddr" @@ -104,31 +99,17 @@
if &BBStage ( - IF "&debug"=="" - ( - d.load.binary build/coreboot.rom 0xA0000000 - ) - &imgpath="build\cbfs\fallback\bootblock.elf" + &imgpath="build\cbfs\fallback\bootblock.raw.elf" if (&RAMLoad) d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath else d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
- ;uncomment b.s if not simulating (CONFIG_SOC_SIMULATE) - ;b.s run_romstage /o - ;d.set &PreRamConsoleAddr++0x8000 0 - d.dump &PreRamConsoleAddr /spotlight - IF (STR.CP("&debug","DEBUG")) - ( - print %String "Now the control is in BootBlock, press enter after debugging to go to next stage" - print %String "Press enter to go to next stage" - enter - ) - ELSE - ( - go - enddo - ) + d.l + + print %String "Now the control is in BootBlock, press enter after debugging to go to next stage" + print %String "Press enter to go to next stage" + enter )
go &VEREntryAddr @@ -163,22 +144,29 @@ enter )
+;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + ; go &QCLEntryAddr ; wait !run() -; + ; if &QCLStage ; ( -; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf" + ; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear -; +; d.load ...\QcLib.dll +; else +; d.load ...\QcLib.dll + + ; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage" ; print %String "Press enter to go to next stage" ; enter ; )
+;;;; END OF QCLIB COMMENTED OUT CODE +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + go &RAMEntryAddr wait !run()
@@ -194,24 +182,9 @@ enter )
-; BL31 disabled for now -; Next block of code commented out -; go &BL31EntryAddr -; wait !run() -; -; if &BL31Stage -; ( -; &imgpath="build\bl31.elf" -; if (&RAMLoad) -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath -; else -; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode -; y.spath.srd 3rdparty/arm-trusted-firmware -; print %String "Now the control is in BL31, press enter after debugging to go to next stage" -; print %String "Press enter to go to next stage" -; enter -; ) -; End of commented out code block: bl31 +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
go &DCEntryAddr wait !run() @@ -220,36 +193,16 @@ ( &imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf" symbol.sourcepath.setbasedir &srcpath\payloads + y.spath.srd payloads\external\depthcharge\depthcharge\src if (&RAMLoad) d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath else d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode - b.d /all - b.set main - b.set halt - b.set &KernelEntryAddr ; kernel entry point - y.spath.srd + payloads/external/depthcharge/depthcharge - y.spath.srd + 3rdparty\vboot_reference - d.dump &RamConsoleAddr /spotlight - &CBTablePtr=Register(X0) - Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400 - print %String "Now the control is in Depthcharge, press enter after debugging to run free" - ;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel" - print %String "Press enter when done debugging Depthcharge" - enter + print %String "Now the control is in depthcharge, end of script" + d.l + ;b.s main + ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel() + ;y.spath.srd 3rdparty\vboot\firmware )
-; go &KernelEntryAddr -; wait !run() -; -; if &KernelSyms -; ( -; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:" -; print %String "vmlinux needs to be copied from ChromiumOS build tree" -; print %String "msm-4.4 needs to be symbolic link to kernel source tree" -; d.load.elf vmlinux /strippart "msm-4.4" /nocode -; y.spath.srd msm-4.4 -; print %String "This script now concludes at kernel entry point" -; ) - enddo diff --git a/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm new file mode 100644 index 0000000..5d72ff7 --- /dev/null +++ b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm @@ -0,0 +1,131 @@ +;============================================================================ +;## +;## This file is part of the coreboot project. +;## +;## Copyright (C) 2019, The Linux Foundation. All rights reserved. +;## +;## This program is free software; you can redistribute it and/or modify +;## it under the terms of the GNU General Public License version 2 and +;## only version 2 as published by the Free Software Foundation. +;## +;## This program is distributed in the hope that it will be useful, +;## but WITHOUT ANY WARRANTY; without even the implied warranty of +;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;## GNU General Public License for more details. +;## +;============================================================================ +; Name: +; debug_cb_trogdor.cmm +; +; Description: +; Debug coreboot trogdor front-end +;============================================================================ + +;============================================================================ +; CMM script variables +;============================================================================ + +LOCAL &TargetPkg + +GLOBAL &BBEntryAddr // Bootblock Entry +GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec +GLOBAL &VEREntryAddr // Verstage Entry +GLOBAL &ROMEntryAddr // Romstage Entry +GLOBAL &QCLEntryAddr // QCLstage Entry +GLOBAL &RAMEntryAddr // Ramstage Entry +GLOBAL &BL31EntryAddr // BL31 Entry +GLOBAL &DCEntryAddr // Depthcharge Entry + +GLOBAL &PreRamConsoleAddr +GLOBAL &RamConsoleAddr +GLOBAL &PreRamCbfsCache +GLOBAL &VBoot2Work +GLOBAL &Stack +GLOBAL &Ttb +GLOBAL &Timestamp +GLOBAL &CbmemTop +GLOBAL &PostRamCbfsCache + +GLOBAL &CBTablePtr + +;============================================================================ + +;--------------------------------------------------- +; Entry point +;--------------------------------------------------- +ENTRY &ImageName &RegAddress + + // Later these can be parameterized + &TargetPkg="trogdorPkg" + + // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld + &BBEntryAddr=0x14815000 + &VEREntryAddr=0x14680000 + &ROMEntryAddr=0x14680000 + &QCLEntryAddr=0x1486c950 + &RAMEntryAddr=0xA0800000 + &BL31EntryAddr=0x80C00000 + &DCEntryAddr=0xF1000000 + &KernelEntryAddr=0xD0000000 + + &PreRamConsoleAddr=0x14830800 + &VBoot2Work=0x1484B000 + &Stack=0x14847000 + &Ttb=0x14839000 + &Timestamp=0x14838800 + &PreRamCbfsCache=0x1481F000 + &CbmemTop=0x280000000 + &PostRamCbfsCache=0x9F800000 + // End of memlayout.ld settings + + // Common commands irrespective of &Mode + PATH + &CwDir=os.pwd() + PATH + &CwDir + + // position at top of coreboot tree + // find depth count for source loading + cd ........ + &srcpath=os.pwd() + + +;--------------------------------------------------- +; Setup area and log +;--------------------------------------------------- + area.clear + area.reset + area.create CB_Logs 1000. 8192. + area.select CB_Logs + + area.view CB_Logs + + PRINT %String "Source Path: &srcpath" + + symbol.sourcepath.setbasedir &srcpath\src + + // Make parsing simple, upper-case parameters + &ImageName=STRING.UPR("&ImageName") + if (STR.CP("&ImageName","0X*")) + ( + &RegAddress=&ImageName + &ImageName="" + ) + &RegAddress=STRING.UPR("&RegAddress") + + PRINT %String "ImageName: &ImageName" + PRINT %String "RegAddress: &RegAddress" + + sys.d + sys.up + b.d + y.reset + + if (STR.CP("&RegAddress","0X*")) + D.S EZAXI:&RegAddress %LE %Long 0x80000000 + + go &BBEntryAddr + wait !run() + + DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName + + enddo diff --git a/util/qualcomm/scripts/cmm/debug_chroot_common.cmm b/util/qualcomm/scripts/cmm/debug_chroot_common.cmm new file mode 100644 index 0000000..0e1d58b --- /dev/null +++ b/util/qualcomm/scripts/cmm/debug_chroot_common.cmm @@ -0,0 +1,210 @@ +;============================================================================ +;## +;## This file is part of the coreboot project. +;## +;## Copyright (C) 2018, The Linux Foundation. All rights reserved. +;## +;## This program is free software; you can redistribute it and/or modify +;## it under the terms of the GNU General Public License version 2 and +;## only version 2 as published by the Free Software Foundation. +;## +;## This program is distributed in the hope that it will be useful, +;## but WITHOUT ANY WARRANTY; without even the implied warranty of +;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;## GNU General Public License for more details. +;## +;============================================================================ +; Name: +; debug_chroot_common.cmm +; +; Description: +; Debug chroot coreboot Environment +;============================================================================ + +;============================================================================ +; CMM script variables +;============================================================================ + +LOCAL &BBStage // Bootblock Stage stop? +LOCAL &VERStage // Verify Stage stop? +LOCAL &ROMStage // Rom Stage stop? +LOCAL &QCLStage // QCL Stage stop? +LOCAL &RAMStage // Ram Stage stop? +LOCAL &BL31Stage // BL31 Stage stop? +LOCAL &DCStage // Depthcharge Stage stop? + +LOCAL &RAMLoad // T32 Load Code? + +;============================================================================ + +;--------------------------------------------------- +; Entry point +;--------------------------------------------------- +ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName + + // Parse for RAMLoad first + if (STR.CP("&ImageName","LOAD,*")) + ( + &RAMLoad=TRUE() + &ImageName=STR.CUT("&ImageName",5) + ) + else + &RAMLoad=FALSE() + + // Parse &ImageName the easy way + if (STR.CP("&ImageName","*ALL*")) + ( + &BBStage=TRUE() + &VERStage=TRUE() + &ROMStage=TRUE() + &QCLStage=TRUE() + &RAMStage=TRUE() + ;&BL31Stage=TRUE() + &DCStage=TRUE() + ) + else + ( + &BBStage=STRING.CP("&ImageName","*BB*") + &VERStage=STRING.CP("&ImageName","*VER*") + &ROMStage=STRING.CP("&ImageName","*ROM*") + &QCLStage=STRING.CP("&ImageName","*QCL*") + &RAMStage=STRING.CP("&ImageName","*RAM*") + ;&BL31Stage=STRING.CP("&ImageName","*BL31*") + &DCStage=STRING.CP("&ImageName","*DC*") + ) + + PRINT %String "Debug Script: debug_chroot_common.cmm" + PRINT %String "Images to debug: &ImageName" + PRINT %String "RAMLoad Requested: &RAMLoad" + PRINT %String "BootBlock Entry Addr: &BBEntryAddr" + PRINT %String "VerStage Entry Addr: &VEREntryAddr" + PRINT %String "RomStage Entry Addr: &ROMEntryAddr" + PRINT %String "QCLStage Entry Addr: &QCLEntryAddr" + PRINT %String "RamStage Entry Addr: &RAMEntryAddr" + PRINT %String "BL31 Entry Addr: &BL31EntryAddr" + PRINT %String "DepthCharge Entry Addr: &DCEntryAddr" + PRINT %String "Kernel Entry Addr: &KernelEntryAddr" + PRINT %String "PreRamCbfsCache: &PreRamCbfsCache" + PRINT %String "PreRamConsoleAddr: &PreRamConsoleAddr" + PRINT %String "VBoot2Work: &VBoot2Work" + PRINT %String "Stack: &Stack" + PRINT %String "Ttb: &Ttb" + PRINT %String "Timestamp &Timestamp" + PRINT %String "RamConsoleAddr &RamConsoleAddr" + PRINT %String "CbmemTop &CbmemTop" + PRINT %String "PostRamCbfsCache &PostRamCbfsCache" + + // HW at BB entry, first stop: bootblock + //////////////////////////////////////// + + if &BBStage + ( + &imgpath="build-trogdor\cbfs\fallback\bootblock.raw.elf" + if (&RAMLoad) + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath + else + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode + + d.l + + print %String "Now the control is in BootBlock, press enter after debugging to go to next stage" + print %String "Press enter to go to next stage" + enter + ) + + go &VEREntryAddr + wait !run() + + if &VERStage + ( + &imgpath="build-trogdor\cbfs\fallback\verstage.elf" + if (&RAMLoad) + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /noclear + else + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode /noclear + + print %String "Now the control is in VERStage, press enter after debugging to go to next stage" + print %String "Press enter to go to next stage" + enter + ) + + go &ROMEntryAddr + wait !run() + + if &ROMStage + ( + &imgpath="build-trogdor\cbfs\fallback\romstage.elf" + if (&RAMLoad) + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath + else + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode + + print %String "Now the control is in ROMStage, press enter after debugging to go to next stage" + print %String "Press enter to go to next stage" + enter + ) + +;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +; go &QCLEntryAddr +; wait !run() + +; if &QCLStage +; ( + +; if (&RAMLoad) +; d.load ...\QcLib.dll +; else +; d.load ...\QcLib.dll + + +; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage" +; print %String "Press enter to go to next stage" +; enter +; ) + +;;;; END OF QCLIB COMMENTED OUT CODE +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + + go &RAMEntryAddr + wait !run() + + if &RAMStage + ( + &imgpath="build-trogdor\cbfs\fallback\ramstage.elf" + if (&RAMLoad) + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath + else + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode + + print %String "Now the control is in RAMStage, press enter after debugging to go to next stage" + print %String "Press enter to go to next stage" + enter + ) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + + go &DCEntryAddr + wait !run() + + if &DCStage + ( + &srcpath="......\depthcharge-9999\work\depthcharge-9999\src" + &imgpath="......\depthcharge-9999\work\depthcharge-9999\trogdor\depthcharge.elf" + symbol.sourcepath.setbasedir &srcpath + if (&RAMLoad) + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath + else + d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode + + print %String "Now the control is in depthcharge, end of script" + d.l + ;b.s main + ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel() + ;y.spath.sbd 3rdparty\vboot\firmware + ) + + enddo diff --git a/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm new file mode 100644 index 0000000..d93a4c0 --- /dev/null +++ b/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm @@ -0,0 +1,131 @@ +;============================================================================ +;## +;## This file is part of the coreboot project. +;## +;## Copyright (C) 2019, The Linux Foundation. All rights reserved. +;## +;## This program is free software; you can redistribute it and/or modify +;## it under the terms of the GNU General Public License version 2 and +;## only version 2 as published by the Free Software Foundation. +;## +;## This program is distributed in the hope that it will be useful, +;## but WITHOUT ANY WARRANTY; without even the implied warranty of +;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;## GNU General Public License for more details. +;## +;============================================================================ +; Name: +; debug_chroot_trogdor.cmm +; +; Description: +; Debug coreboot trogdor front-end (in chroot environment) +;============================================================================ + +;============================================================================ +; CMM script variables +;============================================================================ + +LOCAL &TargetPkg + +GLOBAL &BBEntryAddr // Bootblock Entry +GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec +GLOBAL &VEREntryAddr // Verstage Entry +GLOBAL &ROMEntryAddr // Romstage Entry +GLOBAL &QCLEntryAddr // QCLstage Entry +GLOBAL &RAMEntryAddr // Ramstage Entry +GLOBAL &BL31EntryAddr // BL31 Entry +GLOBAL &DCEntryAddr // Depthcharge Entry + +GLOBAL &PreRamConsoleAddr +GLOBAL &RamConsoleAddr +GLOBAL &PreRamCbfsCache +GLOBAL &VBoot2Work +GLOBAL &Stack +GLOBAL &Ttb +GLOBAL &Timestamp +GLOBAL &CbmemTop +GLOBAL &PostRamCbfsCache + +GLOBAL &CBTablePtr + +;============================================================================ + +;--------------------------------------------------- +; Entry point +;--------------------------------------------------- +ENTRY &ImageName &RegAddress + + // Later these can be parameterized + &TargetPkg="trogdorPkg" + + // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld + &BBEntryAddr=0x14815000 + &VEREntryAddr=0x14680000 + &ROMEntryAddr=0x14680000 + &QCLEntryAddr=0x1486c950 + &RAMEntryAddr=0xA0800000 + &BL31EntryAddr=0x80C00000 + &DCEntryAddr=0xF1000000 + &KernelEntryAddr=0xD0000000 + + &PreRamConsoleAddr=0x14830800 + &VBoot2Work=0x1484B000 + &Stack=0x14847000 + &Ttb=0x14839000 + &Timestamp=0x14838800 + &PreRamCbfsCache=0x1481F000 + &CbmemTop=0x280000000 + &PostRamCbfsCache=0x9F800000 + // End of memlayout.ld settings + + // Common commands irrespective of &Mode + PATH + &CwDir=os.pwd() + PATH + &CwDir + + // position at top of coreboot tree + // find depth count for source loading + cd ..............\chroot\build\trogdor\tmp\portage\sys-boot\coreboot-9999\work\coreboot-9999 + &srcpath=os.pwd() + + +;--------------------------------------------------- +; Setup area and log +;--------------------------------------------------- + area.clear + area.reset + area.create CB_Logs 1000. 8192. + area.select CB_Logs + + area.view CB_Logs + + PRINT %String "Source Path: &srcpath" + + symbol.sourcepath.setbasedir &srcpath\src + + // Make parsing simple, upper-case parameters + &ImageName=STRING.UPR("&ImageName") + if (STR.CP("&ImageName","0X*")) + ( + &RegAddress=&ImageName + &ImageName="" + ) + &RegAddress=STRING.UPR("&RegAddress") + + PRINT %String "ImageName: &ImageName" + PRINT %String "RegAddress: &RegAddress" + + sys.d + sys.up + b.d + y.reset + + if (STR.CP("&RegAddress","0X*")) + D.S EZAXI:&RegAddress %LE %Long 0x80000000 + + go &BBEntryAddr + wait !run() + + DO debug_chroot_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName + + enddo diff --git a/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm b/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm deleted file mode 100644 index bebf85d..0000000 --- a/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm +++ /dev/null @@ -1,15 +0,0 @@ -PER.Set.simple SPR:0x36100 %Long 00c5183C -D.S AZSD:0x8600034 %LE %Long 0x8600000 -D.S AZSD:0x8600000 %LE %Long 0x1400000 -d.a 0x8600004 ldr r0,0x8600034 -d.a 0x8600008 mcr p15,0x0,r0,c12,c0,1 -d.a 0x860000c dsb -d.a 0x8600010 isb -d.a 0x8600014 mrc p15,0x0,r1,c12,c0,2 -d.a 0x8600018 orr r1,r1,0x3 -d.a 0x860001c mcr p15,0x0,r1,c12,c0,2 -d.a 0x8600020 isb -d.a 0x8600024 wfi -r.s pc 0x8600004 -go -b
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35505 )
Change subject: trogdor: Add T32 scripts for full boot chain ......................................................................
Patch Set 38:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/455 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/454 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/453
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
Julius Werner (Code Review)
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mturney mturney (Code Review)
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Name of user not set (Code Review)
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Paul Menzel (Code Review)
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Ravi kumar (Code Review)