Julius Werner submitted this change.
trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489
Signed-off-by: Ashwin Kumar <ashk@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35505
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
---
D util/qualcomm/scripts/cmm/clear_bss.cmm
M util/qualcomm/scripts/cmm/debug_cb_common.cmm
A util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm
A util/qualcomm/scripts/cmm/debug_chroot_common.cmm
A util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm
D util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm
6 files changed, 503 insertions(+), 109 deletions(-)
diff --git a/util/qualcomm/scripts/cmm/clear_bss.cmm b/util/qualcomm/scripts/cmm/clear_bss.cmm
deleted file mode 100755
index 16eaac7..0000000
--- a/util/qualcomm/scripts/cmm/clear_bss.cmm
+++ /dev/null
@@ -1,16 +0,0 @@
-d.a 0x80000000 mov x0,#0x8c
-d.a 0x80000004 lsl x0, x0, #0x14
-d.a 0x80000008 mov x1,#0x18
-d.a 0x8000000c lsl x1,x1, #0x10
-d.a 0x80000010 mov x2,#0x0
-d.a 0x80000014 mov x3,#0x80
-d.a 0x80000018 lsl x3, x3, #0x18
-d.a 0x8000001c add x3, x3, #0x14
-d.a 0x80000020 str x2,[x0]
-d.a 0x80000024 sub x1, x1, #0x8
-d.a 0x80000028 add x0, x0, #0x8
-d.a 0x8000002c cmp x1,0x0
-d.a 0x80000030 b.ne 0x20
-d.a 0x80000034 b 0x34
-r.s pc 0x80000000
-go
diff --git a/util/qualcomm/scripts/cmm/debug_cb_common.cmm b/util/qualcomm/scripts/cmm/debug_cb_common.cmm
index 5959ee1..bf90575 100644
--- a/util/qualcomm/scripts/cmm/debug_cb_common.cmm
+++ b/util/qualcomm/scripts/cmm/debug_cb_common.cmm
@@ -33,8 +33,6 @@
LOCAL &BL31Stage // BL31 Stage stop?
LOCAL &DCStage // Depthcharge Stage stop?
-LOCAL &KernelSyms // Load Kernel Symbols?
-
LOCAL &RAMLoad // T32 Load Code?
;============================================================================
@@ -45,10 +43,10 @@
ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
// Parse for RAMLoad first
- if (STR.CP("&ImageName","RAM,*"))
+ if (STR.CP("&ImageName","LOAD,*"))
(
&RAMLoad=TRUE()
- &ImageName=STR.CUT("&ImageName",4)
+ &ImageName=STR.CUT("&ImageName",5)
)
else
&RAMLoad=FALSE()
@@ -63,7 +61,6 @@
&RAMStage=TRUE()
;&BL31Stage=TRUE()
&DCStage=TRUE()
- &KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
)
else
(
@@ -72,14 +69,12 @@
&ROMStage=STRING.CP("&ImageName","*ROM*")
&QCLStage=STRING.CP("&ImageName","*QCL*")
&RAMStage=STRING.CP("&ImageName","*RAM*")
- &BL31Stage=STRING.CP("&ImageName","*BL31*")
+ ;&BL31Stage=STRING.CP("&ImageName","*BL31*")
&DCStage=STRING.CP("&ImageName","*DC*")
- &KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
)
PRINT %String "Debug Script: debug_cb_common.cmm"
PRINT %String "Images to debug: &ImageName"
- PRINT %String "Loading Kernel Symbols: &KernelSyms"
PRINT %String "RAMLoad Requested: &RAMLoad"
PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
PRINT %String "VerStage Entry Addr: &VEREntryAddr"
@@ -104,31 +99,17 @@
if &BBStage
(
- IF "&debug"==""
- (
- d.load.binary build/coreboot.rom 0xA0000000
- )
- &imgpath="build\cbfs\fallback\bootblock.elf"
+ &imgpath="build\cbfs\fallback\bootblock.raw.elf"
if (&RAMLoad)
d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
else
d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
- ;uncomment b.s if not simulating (CONFIG_SOC_SIMULATE)
- ;b.s run_romstage /o
- ;d.set &PreRamConsoleAddr++0x8000 0
- d.dump &PreRamConsoleAddr /spotlight
- IF (STR.CP("&debug","DEBUG"))
- (
- print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
- print %String "Press enter to go to next stage"
- enter
- )
- ELSE
- (
- go
- enddo
- )
+ d.l
+
+ print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
+ print %String "Press enter to go to next stage"
+ enter
)
go &VEREntryAddr
@@ -163,22 +144,29 @@
enter
)
+;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
; go &QCLEntryAddr
; wait !run()
-;
+
; if &QCLStage
; (
-; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf"
+
; if (&RAMLoad)
-; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear
-; else
-; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear
-;
+; d.load ...\QcLib.dll
+; else
+; d.load ...\QcLib.dll
+
+
; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
; print %String "Press enter to go to next stage"
; enter
; )
+;;;; END OF QCLIB COMMENTED OUT CODE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
go &RAMEntryAddr
wait !run()
@@ -194,24 +182,9 @@
enter
)
-; BL31 disabled for now
-; Next block of code commented out
-; go &BL31EntryAddr
-; wait !run()
-;
-; if &BL31Stage
-; (
-; &imgpath="build\bl31.elf"
-; if (&RAMLoad)
-; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
-; else
-; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
-; y.spath.srd 3rdparty/arm-trusted-firmware
-; print %String "Now the control is in BL31, press enter after debugging to go to next stage"
-; print %String "Press enter to go to next stage"
-; enter
-; )
-; End of commented out code block: bl31
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
go &DCEntryAddr
wait !run()
@@ -220,36 +193,16 @@
(
&imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf"
symbol.sourcepath.setbasedir &srcpath\payloads
+ y.spath.srd payloads\external\depthcharge\depthcharge\src
if (&RAMLoad)
d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath
else
d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode
- b.d /all
- b.set main
- b.set halt
- b.set &KernelEntryAddr ; kernel entry point
- y.spath.srd + payloads/external/depthcharge/depthcharge
- y.spath.srd + 3rdparty\vboot_reference
- d.dump &RamConsoleAddr /spotlight
- &CBTablePtr=Register(X0)
- Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400
- print %String "Now the control is in Depthcharge, press enter after debugging to run free"
- ;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel"
- print %String "Press enter when done debugging Depthcharge"
- enter
+ print %String "Now the control is in depthcharge, end of script"
+ d.l
+ ;b.s main
+ ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel()
+ ;y.spath.srd 3rdparty\vboot\firmware
)
-; go &KernelEntryAddr
-; wait !run()
-;
-; if &KernelSyms
-; (
-; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:"
-; print %String "vmlinux needs to be copied from ChromiumOS build tree"
-; print %String "msm-4.4 needs to be symbolic link to kernel source tree"
-; d.load.elf vmlinux /strippart "msm-4.4" /nocode
-; y.spath.srd msm-4.4
-; print %String "This script now concludes at kernel entry point"
-; )
-
enddo
diff --git a/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm
new file mode 100644
index 0000000..5d72ff7
--- /dev/null
+++ b/util/qualcomm/scripts/cmm/debug_cb_trogdor.cmm
@@ -0,0 +1,131 @@
+;============================================================================
+;##
+;## This file is part of the coreboot project.
+;##
+;## Copyright (C) 2019, The Linux Foundation. All rights reserved.
+;##
+;## This program is free software; you can redistribute it and/or modify
+;## it under the terms of the GNU General Public License version 2 and
+;## only version 2 as published by the Free Software Foundation.
+;##
+;## This program is distributed in the hope that it will be useful,
+;## but WITHOUT ANY WARRANTY; without even the implied warranty of
+;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;## GNU General Public License for more details.
+;##
+;============================================================================
+; Name:
+; debug_cb_trogdor.cmm
+;
+; Description:
+; Debug coreboot trogdor front-end
+;============================================================================
+
+;============================================================================
+; CMM script variables
+;============================================================================
+
+LOCAL &TargetPkg
+
+GLOBAL &BBEntryAddr // Bootblock Entry
+GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
+GLOBAL &VEREntryAddr // Verstage Entry
+GLOBAL &ROMEntryAddr // Romstage Entry
+GLOBAL &QCLEntryAddr // QCLstage Entry
+GLOBAL &RAMEntryAddr // Ramstage Entry
+GLOBAL &BL31EntryAddr // BL31 Entry
+GLOBAL &DCEntryAddr // Depthcharge Entry
+
+GLOBAL &PreRamConsoleAddr
+GLOBAL &RamConsoleAddr
+GLOBAL &PreRamCbfsCache
+GLOBAL &VBoot2Work
+GLOBAL &Stack
+GLOBAL &Ttb
+GLOBAL &Timestamp
+GLOBAL &CbmemTop
+GLOBAL &PostRamCbfsCache
+
+GLOBAL &CBTablePtr
+
+;============================================================================
+
+;---------------------------------------------------
+; Entry point
+;---------------------------------------------------
+ENTRY &ImageName &RegAddress
+
+ // Later these can be parameterized
+ &TargetPkg="trogdorPkg"
+
+ // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld
+ &BBEntryAddr=0x14815000
+ &VEREntryAddr=0x14680000
+ &ROMEntryAddr=0x14680000
+ &QCLEntryAddr=0x1486c950
+ &RAMEntryAddr=0xA0800000
+ &BL31EntryAddr=0x80C00000
+ &DCEntryAddr=0xF1000000
+ &KernelEntryAddr=0xD0000000
+
+ &PreRamConsoleAddr=0x14830800
+ &VBoot2Work=0x1484B000
+ &Stack=0x14847000
+ &Ttb=0x14839000
+ &Timestamp=0x14838800
+ &PreRamCbfsCache=0x1481F000
+ &CbmemTop=0x280000000
+ &PostRamCbfsCache=0x9F800000
+ // End of memlayout.ld settings
+
+ // Common commands irrespective of &Mode
+ PATH
+ &CwDir=os.pwd()
+ PATH + &CwDir
+
+ // position at top of coreboot tree
+ // find depth count for source loading
+ cd ..\..\..\..
+ &srcpath=os.pwd()
+
+
+;---------------------------------------------------
+; Setup area and log
+;---------------------------------------------------
+ area.clear
+ area.reset
+ area.create CB_Logs 1000. 8192.
+ area.select CB_Logs
+
+ area.view CB_Logs
+
+ PRINT %String "Source Path: &srcpath"
+
+ symbol.sourcepath.setbasedir &srcpath\src
+
+ // Make parsing simple, upper-case parameters
+ &ImageName=STRING.UPR("&ImageName")
+ if (STR.CP("&ImageName","0X*"))
+ (
+ &RegAddress=&ImageName
+ &ImageName=""
+ )
+ &RegAddress=STRING.UPR("&RegAddress")
+
+ PRINT %String "ImageName: &ImageName"
+ PRINT %String "RegAddress: &RegAddress"
+
+ sys.d
+ sys.up
+ b.d
+ y.reset
+
+ if (STR.CP("&RegAddress","0X*"))
+ D.S EZAXI:&RegAddress %LE %Long 0x80000000
+
+ go &BBEntryAddr
+ wait !run()
+
+ DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
+
+ enddo
diff --git a/util/qualcomm/scripts/cmm/debug_chroot_common.cmm b/util/qualcomm/scripts/cmm/debug_chroot_common.cmm
new file mode 100644
index 0000000..0e1d58b
--- /dev/null
+++ b/util/qualcomm/scripts/cmm/debug_chroot_common.cmm
@@ -0,0 +1,210 @@
+;============================================================================
+;##
+;## This file is part of the coreboot project.
+;##
+;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
+;##
+;## This program is free software; you can redistribute it and/or modify
+;## it under the terms of the GNU General Public License version 2 and
+;## only version 2 as published by the Free Software Foundation.
+;##
+;## This program is distributed in the hope that it will be useful,
+;## but WITHOUT ANY WARRANTY; without even the implied warranty of
+;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;## GNU General Public License for more details.
+;##
+;============================================================================
+; Name:
+; debug_chroot_common.cmm
+;
+; Description:
+; Debug chroot coreboot Environment
+;============================================================================
+
+;============================================================================
+; CMM script variables
+;============================================================================
+
+LOCAL &BBStage // Bootblock Stage stop?
+LOCAL &VERStage // Verify Stage stop?
+LOCAL &ROMStage // Rom Stage stop?
+LOCAL &QCLStage // QCL Stage stop?
+LOCAL &RAMStage // Ram Stage stop?
+LOCAL &BL31Stage // BL31 Stage stop?
+LOCAL &DCStage // Depthcharge Stage stop?
+
+LOCAL &RAMLoad // T32 Load Code?
+
+;============================================================================
+
+;---------------------------------------------------
+; Entry point
+;---------------------------------------------------
+ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
+
+ // Parse for RAMLoad first
+ if (STR.CP("&ImageName","LOAD,*"))
+ (
+ &RAMLoad=TRUE()
+ &ImageName=STR.CUT("&ImageName",5)
+ )
+ else
+ &RAMLoad=FALSE()
+
+ // Parse &ImageName the easy way
+ if (STR.CP("&ImageName","*ALL*"))
+ (
+ &BBStage=TRUE()
+ &VERStage=TRUE()
+ &ROMStage=TRUE()
+ &QCLStage=TRUE()
+ &RAMStage=TRUE()
+ ;&BL31Stage=TRUE()
+ &DCStage=TRUE()
+ )
+ else
+ (
+ &BBStage=STRING.CP("&ImageName","*BB*")
+ &VERStage=STRING.CP("&ImageName","*VER*")
+ &ROMStage=STRING.CP("&ImageName","*ROM*")
+ &QCLStage=STRING.CP("&ImageName","*QCL*")
+ &RAMStage=STRING.CP("&ImageName","*RAM*")
+ ;&BL31Stage=STRING.CP("&ImageName","*BL31*")
+ &DCStage=STRING.CP("&ImageName","*DC*")
+ )
+
+ PRINT %String "Debug Script: debug_chroot_common.cmm"
+ PRINT %String "Images to debug: &ImageName"
+ PRINT %String "RAMLoad Requested: &RAMLoad"
+ PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
+ PRINT %String "VerStage Entry Addr: &VEREntryAddr"
+ PRINT %String "RomStage Entry Addr: &ROMEntryAddr"
+ PRINT %String "QCLStage Entry Addr: &QCLEntryAddr"
+ PRINT %String "RamStage Entry Addr: &RAMEntryAddr"
+ PRINT %String "BL31 Entry Addr: &BL31EntryAddr"
+ PRINT %String "DepthCharge Entry Addr: &DCEntryAddr"
+ PRINT %String "Kernel Entry Addr: &KernelEntryAddr"
+ PRINT %String "PreRamCbfsCache: &PreRamCbfsCache"
+ PRINT %String "PreRamConsoleAddr: &PreRamConsoleAddr"
+ PRINT %String "VBoot2Work: &VBoot2Work"
+ PRINT %String "Stack: &Stack"
+ PRINT %String "Ttb: &Ttb"
+ PRINT %String "Timestamp &Timestamp"
+ PRINT %String "RamConsoleAddr &RamConsoleAddr"
+ PRINT %String "CbmemTop &CbmemTop"
+ PRINT %String "PostRamCbfsCache &PostRamCbfsCache"
+
+ // HW at BB entry, first stop: bootblock
+ ////////////////////////////////////////
+
+ if &BBStage
+ (
+ &imgpath="build-trogdor\cbfs\fallback\bootblock.raw.elf"
+ if (&RAMLoad)
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
+ else
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
+
+ d.l
+
+ print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
+ print %String "Press enter to go to next stage"
+ enter
+ )
+
+ go &VEREntryAddr
+ wait !run()
+
+ if &VERStage
+ (
+ &imgpath="build-trogdor\cbfs\fallback\verstage.elf"
+ if (&RAMLoad)
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /noclear
+ else
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode /noclear
+
+ print %String "Now the control is in VERStage, press enter after debugging to go to next stage"
+ print %String "Press enter to go to next stage"
+ enter
+ )
+
+ go &ROMEntryAddr
+ wait !run()
+
+ if &ROMStage
+ (
+ &imgpath="build-trogdor\cbfs\fallback\romstage.elf"
+ if (&RAMLoad)
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
+ else
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
+
+ print %String "Now the control is in ROMStage, press enter after debugging to go to next stage"
+ print %String "Press enter to go to next stage"
+ enter
+ )
+
+;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+; go &QCLEntryAddr
+; wait !run()
+
+; if &QCLStage
+; (
+
+; if (&RAMLoad)
+; d.load ...\QcLib.dll
+; else
+; d.load ...\QcLib.dll
+
+
+; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
+; print %String "Press enter to go to next stage"
+; enter
+; )
+
+;;;; END OF QCLIB COMMENTED OUT CODE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+ go &RAMEntryAddr
+ wait !run()
+
+ if &RAMStage
+ (
+ &imgpath="build-trogdor\cbfs\fallback\ramstage.elf"
+ if (&RAMLoad)
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
+ else
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
+
+ print %String "Now the control is in RAMStage, press enter after debugging to go to next stage"
+ print %String "Press enter to go to next stage"
+ enter
+ )
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+ go &DCEntryAddr
+ wait !run()
+
+ if &DCStage
+ (
+ &srcpath="..\..\..\depthcharge-9999\work\depthcharge-9999\src"
+ &imgpath="..\..\..\depthcharge-9999\work\depthcharge-9999\trogdor\depthcharge.elf"
+ symbol.sourcepath.setbasedir &srcpath
+ if (&RAMLoad)
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
+ else
+ d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
+
+ print %String "Now the control is in depthcharge, end of script"
+ d.l
+ ;b.s main
+ ;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel()
+ ;y.spath.sbd 3rdparty\vboot\firmware
+ )
+
+ enddo
diff --git a/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm b/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm
new file mode 100644
index 0000000..d93a4c0
--- /dev/null
+++ b/util/qualcomm/scripts/cmm/debug_chroot_trogdor.cmm
@@ -0,0 +1,131 @@
+;============================================================================
+;##
+;## This file is part of the coreboot project.
+;##
+;## Copyright (C) 2019, The Linux Foundation. All rights reserved.
+;##
+;## This program is free software; you can redistribute it and/or modify
+;## it under the terms of the GNU General Public License version 2 and
+;## only version 2 as published by the Free Software Foundation.
+;##
+;## This program is distributed in the hope that it will be useful,
+;## but WITHOUT ANY WARRANTY; without even the implied warranty of
+;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;## GNU General Public License for more details.
+;##
+;============================================================================
+; Name:
+; debug_chroot_trogdor.cmm
+;
+; Description:
+; Debug coreboot trogdor front-end (in chroot environment)
+;============================================================================
+
+;============================================================================
+; CMM script variables
+;============================================================================
+
+LOCAL &TargetPkg
+
+GLOBAL &BBEntryAddr // Bootblock Entry
+GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
+GLOBAL &VEREntryAddr // Verstage Entry
+GLOBAL &ROMEntryAddr // Romstage Entry
+GLOBAL &QCLEntryAddr // QCLstage Entry
+GLOBAL &RAMEntryAddr // Ramstage Entry
+GLOBAL &BL31EntryAddr // BL31 Entry
+GLOBAL &DCEntryAddr // Depthcharge Entry
+
+GLOBAL &PreRamConsoleAddr
+GLOBAL &RamConsoleAddr
+GLOBAL &PreRamCbfsCache
+GLOBAL &VBoot2Work
+GLOBAL &Stack
+GLOBAL &Ttb
+GLOBAL &Timestamp
+GLOBAL &CbmemTop
+GLOBAL &PostRamCbfsCache
+
+GLOBAL &CBTablePtr
+
+;============================================================================
+
+;---------------------------------------------------
+; Entry point
+;---------------------------------------------------
+ENTRY &ImageName &RegAddress
+
+ // Later these can be parameterized
+ &TargetPkg="trogdorPkg"
+
+ // These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld
+ &BBEntryAddr=0x14815000
+ &VEREntryAddr=0x14680000
+ &ROMEntryAddr=0x14680000
+ &QCLEntryAddr=0x1486c950
+ &RAMEntryAddr=0xA0800000
+ &BL31EntryAddr=0x80C00000
+ &DCEntryAddr=0xF1000000
+ &KernelEntryAddr=0xD0000000
+
+ &PreRamConsoleAddr=0x14830800
+ &VBoot2Work=0x1484B000
+ &Stack=0x14847000
+ &Ttb=0x14839000
+ &Timestamp=0x14838800
+ &PreRamCbfsCache=0x1481F000
+ &CbmemTop=0x280000000
+ &PostRamCbfsCache=0x9F800000
+ // End of memlayout.ld settings
+
+ // Common commands irrespective of &Mode
+ PATH
+ &CwDir=os.pwd()
+ PATH + &CwDir
+
+ // position at top of coreboot tree
+ // find depth count for source loading
+ cd ..\..\..\..\..\..\..\chroot\build\trogdor\tmp\portage\sys-boot\coreboot-9999\work\coreboot-9999
+ &srcpath=os.pwd()
+
+
+;---------------------------------------------------
+; Setup area and log
+;---------------------------------------------------
+ area.clear
+ area.reset
+ area.create CB_Logs 1000. 8192.
+ area.select CB_Logs
+
+ area.view CB_Logs
+
+ PRINT %String "Source Path: &srcpath"
+
+ symbol.sourcepath.setbasedir &srcpath\src
+
+ // Make parsing simple, upper-case parameters
+ &ImageName=STRING.UPR("&ImageName")
+ if (STR.CP("&ImageName","0X*"))
+ (
+ &RegAddress=&ImageName
+ &ImageName=""
+ )
+ &RegAddress=STRING.UPR("&RegAddress")
+
+ PRINT %String "ImageName: &ImageName"
+ PRINT %String "RegAddress: &RegAddress"
+
+ sys.d
+ sys.up
+ b.d
+ y.reset
+
+ if (STR.CP("&RegAddress","0X*"))
+ D.S EZAXI:&RegAddress %LE %Long 0x80000000
+
+ go &BBEntryAddr
+ wait !run()
+
+ DO debug_chroot_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
+
+ enddo
diff --git a/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm b/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm
deleted file mode 100644
index bebf85d..0000000
--- a/util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm
+++ /dev/null
@@ -1,15 +0,0 @@
-PER.Set.simple SPR:0x36100 %Long 00c5183C
-D.S AZSD:0x8600034 %LE %Long 0x8600000
-D.S AZSD:0x8600000 %LE %Long 0x1400000
-d.a 0x8600004 ldr r0,0x8600034
-d.a 0x8600008 mcr p15,0x0,r0,c12,c0,1
-d.a 0x860000c dsb
-d.a 0x8600010 isb
-d.a 0x8600014 mrc p15,0x0,r1,c12,c0,2
-d.a 0x8600018 orr r1,r1,0x3
-d.a 0x860001c mcr p15,0x0,r1,c12,c0,2
-d.a 0x8600020 isb
-d.a 0x8600024 wfi
-r.s pc 0x8600004
-go
-b
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