HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34093 )
Change subject: src: Fix 'inlining failed' ......................................................................
src: Fix 'inlining failed'
This is spotted out using -Winline
Change-Id: I0d57a3914c7ba0cbeea151d86e604843039730bc Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/x86/include/arch/cpu.h M src/commonlib/include/commonlib/endian.h M src/cpu/intel/microcode/microcode.c M src/include/bcd.h M src/include/device/i2c_bus.h M src/include/device/smbus.h M src/include/pc80/mc146818rtc.h M src/lib/memrange.c M src/lib/ramtest.c 9 files changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/34093/1
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 38066c1..ac757c1 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -272,7 +272,7 @@ uint8_t x86_mask; };
-static inline void get_fms(struct cpuinfo_x86 *c, uint32_t tfms) +static void get_fms(struct cpuinfo_x86 *c, uint32_t tfms) { c->x86 = (tfms >> 8) & 0xf; c->x86_model = (tfms >> 4) & 0xf; diff --git a/src/commonlib/include/commonlib/endian.h b/src/commonlib/include/commonlib/endian.h index 7b08eee..86084e2 100644 --- a/src/commonlib/include/commonlib/endian.h +++ b/src/commonlib/include/commonlib/endian.h @@ -95,7 +95,7 @@ write_be16(d, val); }
-static inline uint32_t read_be32(const void *src) +static uint32_t read_be32(const void *src) { const uint8_t *s = src; return (((uint32_t)s[0]) << 24) | (((uint32_t)s[1]) << 16) | @@ -199,7 +199,7 @@ write_le16(d, val); }
-static inline uint32_t read_le32(const void *src) +static uint32_t read_le32(const void *src) { const uint8_t *s = src; return (((uint32_t)s[3]) << 24) | (((uint32_t)s[2]) << 16) | diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index 44f7f1f..5b80662 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -49,7 +49,7 @@ u32 reserved[3]; };
-static inline u32 read_microcode_rev(void) +static u32 read_microcode_rev(void) { /* Some Intel CPUs can be very finicky about the * CPUID sequence used. So this is implemented in diff --git a/src/include/bcd.h b/src/include/bcd.h index faf3b18..298abfd 100644 --- a/src/include/bcd.h +++ b/src/include/bcd.h @@ -18,12 +18,12 @@
#include <stdint.h>
-static inline uint8_t bcd2bin(uint8_t val) +static uint8_t bcd2bin(uint8_t val) { return ((val >> 4) & 0xf) * 10 + (val & 0xf); }
-static inline uint8_t bin2bcd(uint8_t val) +static uint8_t bin2bcd(uint8_t val) { return ((val / 10) << 4) | (val % 10); } diff --git a/src/include/device/i2c_bus.h b/src/include/device/i2c_bus.h index 6aa4f9b..58d885f 100644 --- a/src/include/device/i2c_bus.h +++ b/src/include/device/i2c_bus.h @@ -39,7 +39,7 @@ * * Returns NULL if i2c_link(dev) returns NULL. */ -static inline DEVTREE_CONST struct device *i2c_busdev(struct device *dev) +static DEVTREE_CONST struct device *i2c_busdev(struct device *dev) { struct bus *const link = i2c_link(dev); return link ? link->dev : NULL; diff --git a/src/include/device/smbus.h b/src/include/device/smbus.h index 2953b25..ca264d9 100644 --- a/src/include/device/smbus.h +++ b/src/include/device/smbus.h @@ -17,7 +17,7 @@ const u8 *buffer); };
-static inline const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) +static const struct smbus_bus_operations *ops_smbus_bus(struct bus *bus) { const struct smbus_bus_operations *bops;
diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 6fa5e46..477edfc2 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -103,7 +103,7 @@ #define PC_CKS_RANGE_END 45 #define PC_CKS_LOC 46
-static inline unsigned char cmos_read(unsigned char addr) +static unsigned char cmos_read(unsigned char addr) { int offs = 0; if (addr >= 128) { @@ -135,7 +135,7 @@ outb(val, RTC_BASE_PORT + offs + 1); }
-static inline void cmos_write(unsigned char val, unsigned char addr) +static void cmos_write(unsigned char val, unsigned char addr) { u8 control_state = cmos_read(RTC_CONTROL); /* There are various places where RTC bits might be hiding, diff --git a/src/lib/memrange.c b/src/lib/memrange.c index 79a1b0e..e910d65 100644 --- a/src/lib/memrange.c +++ b/src/lib/memrange.c @@ -52,7 +52,7 @@ return NULL; }
-static inline struct range_entry * +static struct range_entry * range_list_add(struct memranges *ranges, struct range_entry **prev_ptr, resource_t begin, resource_t end, unsigned long tag) { diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index 489ca28..2cb41ba 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -45,7 +45,7 @@ * @param addr Memory to access on idx * @param value Value to write or read at addr */ -static inline void test_pattern(unsigned short int idx, +static void test_pattern(unsigned short int idx, unsigned long *addr, unsigned long *value) { uint8_t j, k;
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/34093 )
Change subject: src: Fix 'inlining failed' ......................................................................
Abandoned
HAOUAS Elyes has restored this change. ( https://review.coreboot.org/c/coreboot/+/34093 )
Change subject: src: Fix 'inlining failed' ......................................................................
Restored
Hello Kyösti Mälkki, Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34093
to look at the new patch set (#2).
Change subject: src: Fix 'inlining failed' ......................................................................
src: Fix 'inlining failed'
This is spotted out using -Winline
Change-Id: I0d57a3914c7ba0cbeea151d86e604843039730bc Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/x86/include/arch/cpu.h M src/commonlib/include/commonlib/endian.h M src/cpu/intel/microcode/microcode.c M src/include/bcd.h M src/include/device/i2c_bus.h M src/include/device/smbus.h M src/include/pc80/mc146818rtc.h M src/lib/memrange.c M src/lib/ramtest.c 9 files changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/34093/2
Hello Kyösti Mälkki, Patrick Rudolph, Arthur Heymans, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34093
to look at the new patch set (#3).
Change subject: [test]src: Fix 'inlining failed' ......................................................................
[test]src: Fix 'inlining failed'
This is spotted out using -Winline
Change-Id: I0d57a3914c7ba0cbeea151d86e604843039730bc Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/arch/x86/include/arch/cpu.h M src/commonlib/include/commonlib/endian.h M src/cpu/intel/microcode/microcode.c M src/include/bcd.h M src/include/device/i2c_bus.h M src/include/device/smbus.h M src/include/pc80/mc146818rtc.h M src/lib/memrange.c M src/lib/ramtest.c 9 files changed, 12 insertions(+), 12 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/34093/3
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/34093 )
Change subject: [test]src: Fix 'inlining failed' ......................................................................
Abandoned
-
HAOUAS Elyes (Code Review)