Change in coreboot[master]: mb/google/hatch: Switch USB2 port1 and port3 on Dooly

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42409 )

Change subject: mb/google/hatch: Switch USB2 port1 and port3 on Dooly
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mb/google/hatch: Switch USB2 port1 and port3 on Dooly

Switch USB2 port1 and port3 for dooly due to circuit change.

BUG=b:156429564
BRANCH=none
TEST=none

Change-Id: I74daa5d3d3722e0d59bb04758bd25e5e57a420db
Signed-off-by: Edward O'Callaghan 
---
M src/mainboard/google/hatch/variants/dooly/overridetree.cb
1 file changed, 10 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/42409/1

diff --git a/src/mainboard/google/hatch/variants/dooly/overridetree.cb b/src/mainboard/google/hatch/variants/dooly/overridetree.cb
index ededac4..ae1bf32 100644
--- a/src/mainboard/google/hatch/variants/dooly/overridetree.cb
+++ b/src/mainboard/google/hatch/variants/dooly/overridetree.cb
@@ -21,9 +21,6 @@
    }"

# USB configuration
-	# NOTE: This only applies to Puff,
-	# usb2_ports[1] and usb2_ports[3] were swapped on
-	# reference schematics after Puff has been built.
    register "usb2_ports[0]" = "{
    	.enable = 1,
    	.ocpin = OC2,
@@ -32,7 +29,14 @@
    	.pre_emp_bias  = USB2_BIAS_11P25MV,
    	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
    }" # Type-A Port 2
-	register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port
+	register "usb2_ports[1]" = "{
+		.enable = 1,
+		.ocpin = OC1,
+		.tx_bias = USB2_BIAS_0MV,
+		.tx_emp_enable = USB2_PRE_EMP_ON,
+		.pre_emp_bias  = USB2_BIAS_28P15MV,
+		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
+	}" # Type-A Port 1
    register "usb2_ports[2]" = "{
    	.enable = 1,
    	.ocpin = OC3,
@@ -41,14 +45,7 @@
    	.pre_emp_bias  = USB2_BIAS_28P15MV,
    	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
    }" # Type-A Port 3
-	register "usb2_ports[3]" = "{
-		.enable = 1,
-		.ocpin = OC1,
-		.tx_bias = USB2_BIAS_0MV,
-		.tx_emp_enable = USB2_PRE_EMP_ON,
-		.pre_emp_bias  = USB2_BIAS_28P15MV,
-		.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP,
-	}" # Type-A Port 1
+	register "usb2_ports[3]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C Port
    register "usb2_ports[4]" = "{
    	.enable = 1,
    	.ocpin = OC_SKIP,
@@ -132,7 +129,7 @@
    # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
    register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515"

-	# Intel HDA - disable I2S Audio SSP1 and DMIC0 as puff variant does not have them.
+	# Intel HDA - disable I2S Audio SSP1 and DMIC0 as dooly variant does not have them.
    register "PchHdaAudioLinkSsp1" = "0"
    register "PchHdaAudioLinkDmic0" = "0"

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/42409 )

Change subject: mb/google/hatch: Switch USB2 port1 and port3 on Dooly
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Abandoned

already done.