Change in coreboot[master]: mb/google/zork:Set USB3 typeA port to force gen1 for morphius
Hello Chris Wang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to review the following change.
Change subject: mb/google/zork:Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork:Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1.So set the corresponding setting to usb3 port force gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build,verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/1
diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index ceacc70..acce883 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -22,6 +22,9 @@
# End : OPN Performance Configuration
+ # Force USB3 port to gen1, bit0 - controller0 Port0, bit1 - Port1, etc + register "usb3_port_force_gen1" = "0x6" #0110b + # Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ .speed = I2C_SPEED_FAST,
Hello Chris Wang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#2).
Change subject: mb/google/zork:Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork:Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build,verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/2
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork:Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 2:
ㄑ
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork:Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 2:
(4 comments)
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@7 PS2, Line 7: mb/google/zork:Set USB3 typeA port to force gen1 for morphius Please add a space after the colon.
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@9 PS2, Line 9: In morphius, the USBA port needs to set to gen1. Why does it need to be gen1?
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@9 PS2, Line 9: In morphius, the USBA port needs to set to gen1. : So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1. Please add a blank line between paragraphs, or do not break lines after sentences.
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@14 PS2, Line 14: TEST=Build,verify the USB3 speed in gen1 Please add a space after the comma.
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#3).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1.
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/3
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#4).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/soc/amd/picasso/chip.h 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/4
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#6).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/soc/amd/picasso/chip.h 2 files changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/6
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h@... PS6, Line 171: uint32_t usb3_port_force_gen1; Is this being removed intentionally? If so, I don't understand why.
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 7:
(4 comments)
Patch Set 2:
ㄑ
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@7 PS2, Line 7: mb/google/zork:Set USB3 typeA port to force gen1 for morphius
Please add a space after the colon.
Done
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@9 PS2, Line 9: In morphius, the USBA port needs to set to gen1.
Why does it need to be gen1?
it's a board designed.
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@9 PS2, Line 9: In morphius, the USBA port needs to set to gen1. : So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
Please add a blank line between paragraphs, or do not break lines after sentences.
Done
https://review.coreboot.org/c/coreboot/+/45334/2//COMMIT_MSG@14 PS2, Line 14: TEST=Build,verify the USB3 speed in gen1
Please add a space after the comma.
Done
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h@... PS6, Line 171: uint32_t usb3_port_force_gen1;
Is this being removed intentionally? If so, I don't understand why.
it's a rebase mistake. It should been added in another change. https://review.coreboot.org/c/coreboot/+/45333/4/src/soc/amd/picasso/chip.h#...
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... PS8, Line 26: register "usb3_port_force_gen1" = "0x6" #0110b Which ports are these connected to and what is the reasoning?
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#9).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/9
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... PS8, Line 26: register "usb3_port_force_gen1" = "0x6" #0110b
Which ports are these connected to and what is the reasoning?
The USB3A port needs set to Gen1 since it's not gonna support Gen2. So set the xhci0_port1 and xhci0_port2 to force to gen1.
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#10).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/10
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#11).
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
mb/google/zork: Set USB3 typeA port to force gen1 for morphius
In morphius, the USBA port needs to set to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/morphius/overridetree.cb 1 file changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/11
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 typeA port to force gen1 for morphius ......................................................................
Patch Set 14:
(2 comments)
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/8/src/mainboard/google/zork/v... PS8, Line 26: register "usb3_port_force_gen1" = "0x6" #0110b
The USB3A port needs set to Gen1 since it's not gonna support Gen2. […]
Done
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h File src/soc/amd/picasso/chip.h:
https://review.coreboot.org/c/coreboot/+/45334/6/src/soc/amd/picasso/chip.h@... PS6, Line 171: uint32_t usb3_port_force_gen1;
it's a rebase mistake. It should been added in another change. […]
Done
Hello build bot (Jenkins), Furquan Shaikh, Chris Wang, Keith Tzeng, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#15).
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil
In morphius, the USB3 typeA port needs to set to gen1, and for ezkinil all the USB3 ports should force to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb 2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/15
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 15:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45334/15//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45334/15//COMMIT_MSG@9 PS15, Line 9: all Wrap please? 72 characters max for commit messages.
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/ezkinil/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... PS15, Line 29: .ports.xhci0_port3 = 1, What if a PCO part is used? Do we care about XHCI1?
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... PS15, Line 26: .ports.xhci0_port1 = 1, Nit: Maybe add some comments? // USB-A Left, USB-A Right or something?
Hello build bot (Jenkins), Martin Roth, Furquan Shaikh, Marshall Dawson, Chris Wang, Keith Tzeng, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45334
to look at the new patch set (#16).
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil
In morphius, the USB3 typeA port needs to set to gen1, and for ezkinil all the USB3 ports should force to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb 2 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/45334/16
chris wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 16:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45334/15//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45334/15//COMMIT_MSG@9 PS15, Line 9: all
Wrap please? 72 characters max for commit messages.
Done
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/ezkinil/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... PS15, Line 29: .ports.xhci0_port3 = 1,
What if a PCO part is used? Do we care about XHCI1?
from the motherboard design guide,all the GEN2 port should under xhci0. So wouldn't set xhci1 in this case.
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/15/src/mainboard/google/zork/... PS15, Line 26: .ports.xhci0_port1 = 1,
Nit: Maybe add some comments? // USB-A Left, USB-A Right or something?
Done
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... PS16, Line 26: .ports.xhci0_port1 = 1, /* Left USB3A port 1 */ : .ports.xhci0_port2 = 1, /* Left USB3A port 2 */ if i remember correctly all devices i looked at only had at most one type a and one type c port on each side, so i wonder if this device really has two type a ports on one side
Chris Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... PS16, Line 26: .ports.xhci0_port1 = 1, /* Left USB3A port 1 */ : .ports.xhci0_port2 = 1, /* Left USB3A port 2 */
if i remember correctly all devices i looked at only had at most one type a and one type c port on e […]
yes, in morphius, it has two typeA port on left side. You can refer to the C&F. https://docs.google.com/document/d/1YaY6lVXUytldhx6OPi9Ujq25BOqDsAy25UGGmnvf...
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 17: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... File src/mainboard/google/zork/variants/morphius/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/45334/16/src/mainboard/google/zork/... PS16, Line 26: .ports.xhci0_port1 = 1, /* Left USB3A port 1 */ : .ports.xhci0_port2 = 1, /* Left USB3A port 2 */
yes, in morphius, it has two typeA port on left side. […]
ok; just wanted to make sure that this really is the case
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 18: Code-Review+2
Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
Patch Set 18: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45334 )
Change subject: mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil ......................................................................
mb/google/zork: Set USB3 port to force gen1 for morphius and ezkinil
In morphius, the USB3 typeA port needs to set to gen1, and for ezkinil all the USB3 ports should force to gen1. So set the corresponding setting to usb3_port_force_gen1 to force USB3 to Gen1.
BUG=b:167651308 BRANCH=zork TEST=Build, verify the USB3 speed in gen1
Signed-off-by: Chris Wang chris.wang@amd.corp-partner.google.com Change-Id: I10419b91fe86fe3e06de36ddfe0d1769c1031f8e Reviewed-on: https://review.coreboot.org/c/coreboot/+/45334 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Edward O'Callaghan quasisec@chromium.org Reviewed-by: Sam McNally sammc@google.com Reviewed-by: Felix Held felix-coreboot@felixheld.de --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb 2 files changed, 11 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved Sam McNally: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index a60f427..26af394 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -22,7 +22,12 @@
# End : OPN Performance Configuration
- register "xhci0_force_gen1" = "1" + register "usb3_port_force_gen1" = "{ + .ports.xhci0_port0 = 1, + .ports.xhci0_port1 = 1, + .ports.xhci0_port2 = 1, + .ports.xhci0_port3 = 1, + }"
# Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index 3ba7851..41e1c70 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -30,6 +30,11 @@
# End : OPN Performance Configuration
+ register "usb3_port_force_gen1" = "{ + .ports.xhci0_port1 = 1, /* Left USB3A port 1 */ + .ports.xhci0_port2 = 1, /* Left USB3A port 2 */ + }" + # Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ .speed = I2C_SPEED_FAST,
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