Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55964 )
Change subject: src/mainboard/herobrine: Load GSI FW in ramstage ......................................................................
Patch Set 17:
(2 comments)
File src/mainboard/google/herobrine/bootblock.c:
https://review.coreboot.org/c/coreboot/+/55964/comment/dac377a4_5276aa45 PS5, Line 5: #include <soc/qcom_qup_se.h> : #include <soc/qup_se_handlers_common.h> : #include <soc/qupv3_spi_common.h>
Please move these includes to: […]
Done
File src/mainboard/google/herobrine/mainboard.c:
https://review.coreboot.org/c/coreboot/+/55964/comment/551297e9_8d72baf2 PS15, Line 25: qupv3_se_fw_load_and_init(QUPV3_0_SE1, SE_PROTOCOL_I2C, GSI); /* APPS I2C */ : /* : * When coreboot firmware disables serial output, : * we still need to load console UART QUP FW for OS. : */ : if (!CONFIG(CONSOLE_SERIAL)) : qupv3_se_fw_load_and_init(QUPV3_0_SE5, SE_PROTOCOL_UART, FIFO); : : qupv3_se_fw_load_and_init(QUPV3_0_SE7, SE_PROTOCOL_UART, FIFO); /* BT UART */ : qupv3_se_fw_load_and_init(QUPV3_1_SE4, SE_PROTOCOL_SPI, MIXED); /* ESIM SPI */ : qupv3_se_fw_load_and_init(QUPV3_1_SE5, SE_PROTOCOL_I2C, MIXED); /* Touch I2C */ : qupv3_se_fw_load_and_init(QUPV3_1_SE6, SE_PROTOCOL_SPI, MIXED); /* Fingerprint SPI */
We found during Herobrine bringup that these are not actually correct. […]
Ack
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Ravi Kumar Bokka (Code Review)