[XS] Change in coreboot[main]: lib,soc/intel/common/block/smbus: Use a SPD length of 512 bytes for DDR5

Show replies by date

119
days inactive
119
days old

coreboot-gerrit@coreboot.org

0 comments
1 participants

Add to favorites Remove from favorites

tags (0)
participants (1)
  • Tim Crawford (Code Review)