Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
mb/google/dedede: Update CPU critical temperature
Observed thermal shutdown initiated by DPTF due to CPU temperature reaching critical temperature trip value. During stress testing with heavy workload like WebGL Aquarium, sometime CPU temperature spikes till 99 degree Celsius and DPTF initiates system shutdown. This updates CPU critical temperature trip value to 105 degree Celsius to avoid system shutdown.
BUG=None BRANCH=None TEST=Built and tested on dedede system
Change-Id: If15a873a997aa80f20940f27bbafd4498908c091 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/44054/1
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 7502489..d0609ef 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -175,7 +175,7 @@ register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000)" register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 99, SHUTDOWN)" + register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)" register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)" register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)"
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG@16 PS1, Line 16: None I assume there is still ongoing work to improve the thermal situation on dedede?
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG@16 PS1, Line 16: None
I assume there is still ongoing work to improve the thermal situation on dedede?
Yes that's correct. This change is required to unblock the stress testing and full validation of the system. The similar change was submitted for previous generation of atom platforms.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 1: Code-Review+2
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG@16 PS1, Line 16: None
Yes that's correct. […]
TjMax is 105 degree Celsius(as per EDS). Is it good for Silicon to wait all the way till the junction temperature hits TjMax before shutting down?
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG@16 PS1, Line 16: None
TjMax is 105 degree Celsius(as per EDS). […]
Also I believe Tim meant to ask the bug for tracking purposes.
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Tim Wawrzynczak, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44054
to look at the new patch set (#2).
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
mb/google/dedede: Update CPU critical temperature
Observed thermal shutdown initiated by DPTF due to CPU temperature reaching critical temperature trip value. During stress testing with heavy workload like WebGL Aquarium, sometime CPU temperature spikes till 99 degree Celsius and DPTF initiates system shutdown. This updates CPU critical temperature trip value to 105 degree Celsius to avoid system shutdown.
BUG=161993459 BRANCH=None TEST=Built and tested on dedede system
Change-Id: If15a873a997aa80f20940f27bbafd4498908c091 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/44054/2
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/1//COMMIT_MSG@16 PS1, Line 16: None
Also I believe Tim meant to ask the bug for tracking purposes.
We have set TCC offset to 10W, in this case TCC initiates the thermal throttling at (TjMax-offset=95C), so this prevents junction temp to reach TjMax. Also, we have DPTF passive policy which kicks in based on CPU passive threshold. So, as mentioned in changelog during some corner case scenarios we are seeing the CPU temp suddenly spikes till 99C and DPTF initiates shutdown. To overcome this situation, we need this change.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/2//COMMIT_MSG@16 PS2, Line 16: 161993459 nit: "b:161993459"
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Tim Wawrzynczak, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44054
to look at the new patch set (#3).
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
mb/google/dedede: Update CPU critical temperature
Observed thermal shutdown initiated by DPTF due to CPU temperature reaching critical temperature trip value. During stress testing with heavy workload like WebGL Aquarium, sometime CPU temperature spikes till 99 degree Celsius and DPTF initiates system shutdown. This updates CPU critical temperature trip value to 105 degree Celsius to avoid system shutdown.
BUG=b:161993459 BRANCH=None TEST=Built and tested on dedede system
Change-Id: If15a873a997aa80f20940f27bbafd4498908c091 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/44054/3
Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44054/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44054/2//COMMIT_MSG@16 PS2, Line 16: 161993459
nit: "b:161993459"
Done
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44054 )
Change subject: mb/google/dedede: Update CPU critical temperature ......................................................................
mb/google/dedede: Update CPU critical temperature
Observed thermal shutdown initiated by DPTF due to CPU temperature reaching critical temperature trip value. During stress testing with heavy workload like WebGL Aquarium, sometime CPU temperature spikes till 99 degree Celsius and DPTF initiates system shutdown. This updates CPU critical temperature trip value to 105 degree Celsius to avoid system shutdown.
BUG=b:161993459 BRANCH=None TEST=Built and tested on dedede system
Change-Id: If15a873a997aa80f20940f27bbafd4498908c091 Signed-off-by: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44054 Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 7502489..d0609ef 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -175,7 +175,7 @@ register "policies.passive[1]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000)" register "policies.passive[2]" = "DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 99, SHUTDOWN)" + register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 105, SHUTDOWN)" register "policies.critical[1]" = "DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN)" register "policies.critical[2]" = "DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)"
-
Karthik Ramasubramanian (Code Review) -
Patrick Georgi (Code Review)
-
Sumeet R Pawnikar (Code Review)
-
Tim Wawrzynczak (Code Review)