Change in coreboot[master]: mb/intel/tglrvp: Configure GPIO GPP_A23 for retimer force power

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44345 )

Change subject: mb/intel/tglrvp: Configure GPIO GPP_A23 for retimer force power
......................................................................

mb/intel/tglrvp: Configure GPIO GPP_A23 for retimer force power

Retimer needs to be powered on during its firmware upgrade. This change
configures the retimer force power GPIO to be output and 0 initially.
This retimer force power GPIO will be set high during firmware upgrade
and back to low once finished.

BUG=b:162528868
TEST=Built and booted to kernel successfully on TGLRVP board.

Signed-off-by: John Zhao 
Change-Id: I2cb4414cf846ee9a5b0ae05140818da46490fb35
---
M src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
M src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
M src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
3 files changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/44345/1

diff --git a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
index de0adf6..6b7aeaf 100644
--- a/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/intel/tglrvp/variants/baseboard/include/baseboard/gpio.h
@@ -12,4 +12,7 @@
 /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
 #define GPE_EC_WAKE	GPE0_LAN_WAK

+/* Retimer force power */
+#define RT_FORCE_PWR    GPP_A23
+
 #endif /* __BASEBOARD_GPIO_H__ */
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
index 4457506..66a2d99 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/gpio.c
@@ -54,6 +54,9 @@
    /* CNVi */
    PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),  /* CNV_RF_RST_L */
    PAD_CFG_NF(GPP_F5, NONE, DEEP, NF3),  /* CNV_CLKREQ0 */
+
+	/* Retimer force power */
+	PAD_CFG_GPO(GPP_A23, 0, DEEP),
 };

/* Early pad configuration in bootblock */
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
index 679933a..aa33d5a 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/gpio.c
@@ -51,6 +51,8 @@
    PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), /* I2S_MCLK1 */
    PAD_CFG_NF(GPP_F8, NONE, DEEP, NF1),  /* I2S_MCLK2 */

+	/* Retimer force power */
+	PAD_CFG_GPO(GPP_A23, 0, DEEP),
 };

/* Early pad configuration in bootblock */