Change in coreboot[master]: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better ...
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_ISA_SERIAL BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO
Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/romstage/fsp_params.c M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 4 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/40904/1
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 3983d03..4bdbb11 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -198,9 +198,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_ISA_SERIAL = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index a841809..89dd89a 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -60,7 +60,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_ISA_SERIAL : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index a3319d4..fa53371 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -195,9 +195,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_ISA_SERIAL = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index b4521e2..ead20ff 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -71,7 +71,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_ISA_SERIAL : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/40904/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40904/1//COMMIT_MSG@9 PS1, Line 9: DEBUG_INTERFACE_ISA_SERIAL What does "ISA serial" mean in this context? I thought ISA was no longer a thing in computers from the last two decades (well, LPC is related to ISA).
I see that we use `DRIVERS_UART_8250IO` as a condition to choose between these two options. Is this because `DEBUG_INTERFACE_ISA_SERIAL` uses IO ports (e.g. 0x3f8), and `DEBUG_INTERFACE_LPSS_SERIAL_IO` is a memory-mapped device?
If so, should we refer to `ISA_SERIAL` as `DEBUG_INTERFACE_UART_8250IO` instead?
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Wonkyu Kim, Maulik V Vaghela, Angel Pons, Aamir Bohra, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40904
to look at the new patch set (#2).
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_UART_8250IO BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO
Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/romstage/fsp_params.c M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 4 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/40904/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40904/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40904/1//COMMIT_MSG@9 PS1, Line 9: DEBUG_INTERFACE_ISA_SERIAL
What does "ISA serial" mean in this context? I thought ISA was no longer a thing in computers from the last two decades (well, LPC is related to ISA).
yeah, we still have legacy IO's :) that typically been refereed as ISA. but can be avoided here.
I see that we use `DRIVERS_UART_8250IO` as a condition to choose between these two options. Is this because `DEBUG_INTERFACE_ISA_SERIAL` uses IO ports (e.g. 0x3f8), and `DEBUG_INTERFACE_LPSS_SERIAL_IO` is a memory-mapped device?
Yes, you are right here
If so, should we refer to `ISA_SERIAL` as `DEBUG_INTERFACE_UART_8250IO` instead?
Done
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_UART_8250IO BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO
Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40904 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/romstage/fsp_params.c M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 4 files changed, 6 insertions(+), 6 deletions(-)
Approvals: build bot (Jenkins): Verified Wonkyu Kim: Looks good to me, approved
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index a6932bc..886f823 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -201,9 +201,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_UART_8250IO = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index a841809..bb7db65 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -60,7 +60,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index fe33835..9f12dae 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -198,9 +198,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_UART_8250IO = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index b4521e2..022cd83 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -71,7 +71,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
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Aamir Bohra (Code Review) -
Angel Pons (Code Review)
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Patrick Georgi (Code Review)
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Subrata Banik (Code Review)
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Wonkyu Kim (Code Review)