Change in coreboot[master]: sb/intel/i82371eb: Enable upper NVRAM bank

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Keith Hui (Code Review)

11 Jan 2020 11 Jan '20

10:54 a.m.

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38368/1

diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c index 711b317..2688e37 100644 --- a/src/southbridge/intel/i82371eb/bootblock.c +++ b/src/southbridge/intel/i82371eb/bootblock.c @@ -61,4 +61,9 @@ reg16 |= LOWER_BIOS_ENABLE | EXT_BIOS_ENABLE | EXT_BIOS_ENABLE_1MB; reg16 &= ~(WRITE_PROTECT_ENABLE); /* Disable ROM write access. */ pci_write_config16(dev, XBCS, reg16); + + /* Enable (RTC and) upper NVRAM bank. */ + pci_write_config8(dev, RTCCFG, + RTC_POS_DECODE | UPPER_RAM_EN | RTC_ENABLE); + }

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Angel Pons (Code Review)

11 Jan 11 Jan

2:18 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 1: Code-Review+1

(2 comments)

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/bootblock.c:

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... PS1, Line 67: RTC_POS_DECODE | UPPER_RAM_EN | RTC_ENABLE); Fits on the previous line (we switched to 96 characters not too long ago)

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... PS1, Line 68: Empty line

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sat, 11 Jan 2020 22:18:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Keith Hui (Code Review)

6:16 p.m.

Hello Patrick Rudolph, Angel Pons, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38368

to look at the new patch set (#2).

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38368/2

Keith Hui (Code Review)

6:16 p.m.

Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 2:

(2 comments)

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/bootblock.c:

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... PS1, Line 67: RTC_POS_DECODE | UPPER_RAM_EN | RTC_ENABLE);

...

Fits on the previous line (we switched to 96 characters not too long ago)

Done

https://review.coreboot.org/c/coreboot/+/38368/1/src/southbridge/intel/i8237... PS1, Line 68:

...

Empty line

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 12 Jan 2020 02:16:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

12 Jan 12 Jan

1:55 a.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 2: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 12 Jan 2020 09:55:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Paul Menzel (Code Review)

13 Jan 13 Jan

3:12 a.m.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 2: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Mon, 13 Jan 2020 11:12:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Keith Hui (Code Review)

27 Jan 27 Jan

3:27 p.m.

Hello Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38368

to look at the new patch set (#3).

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38368/3

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Keith Hui (Code Review)

3:33 p.m.

Hello Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38368

to look at the new patch set (#4).

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38368/4

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 4 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

2 Feb 2 Feb

4:13 a.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 4: Code-Review+2

(1 comment)

https://review.coreboot.org/c/coreboot/+/38368/4/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/bootblock.c:

https://review.coreboot.org/c/coreboot/+/38368/4/src/southbridge/intel/i8237... PS4, Line 67: The blank line came back? Judging from the other patchsets, I guess there was some git entropy?

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 4 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Sun, 02 Feb 2020 12:13:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Keith Hui (Code Review)

9:15 a.m.

Hello Patrick Rudolph, Angel Pons, Paul Menzel, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/38368

to look at the new patch set (#6).

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38368/6

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: newpatchset

Patrick Georgi (Code Review)

2 Mar 2 Mar

11:34 p.m.

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 6: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Tue, 03 Mar 2020 07:34:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Patrick Georgi (Code Review)

11:35 p.m.

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/c/coreboot/+/38368/4/src/southbridge/intel/i8237... File src/southbridge/intel/i82371eb/bootblock.c:

https://review.coreboot.org/c/coreboot/+/38368/4/src/southbridge/intel/i8237... PS4, Line 67:

...

The blank line came back? Judging from the other patchsets, I guess there was some git entropy?

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-Comment-Date: Tue, 03 Mar 2020 07:35:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Patrick Georgi (Code Review)

11:35 p.m.

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38368 )

Change subject: sb/intel/i82371eb: Enable upper NVRAM bank ......................................................................

sb/intel/i82371eb: Enable upper NVRAM bank

Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Signed-off-by: Keith Hui buurin@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38368 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/southbridge/intel/i82371eb/bootblock.c 1 file changed, 3 insertions(+), 0 deletions(-)

Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved

diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c index 711b317..581db81 100644 --- a/src/southbridge/intel/i82371eb/bootblock.c +++ b/src/southbridge/intel/i82371eb/bootblock.c @@ -61,4 +61,7 @@ reg16 |= LOWER_BIOS_ENABLE | EXT_BIOS_ENABLE | EXT_BIOS_ENABLE_1MB; reg16 &= ~(WRITE_PROTECT_ENABLE); /* Disable ROM write access. */ pci_write_config16(dev, XBCS, reg16); + + /* Enable (RTC and) upper NVRAM bank. */ + pci_write_config8(dev, RTCCFG, RTC_POS_DECODE | UPPER_RAM_EN | RTC_ENABLE); }

-- To view, visit https://review.coreboot.org/c/coreboot/+/38368 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94 Gerrit-Change-Number: 38368 Gerrit-PatchSet: 7 Gerrit-Owner: Keith Hui buurin@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Keith Hui buurin@gmail.com Gerrit-Reviewer: Patrick Georgi pgeorgi@google.com Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org Gerrit-Reviewer: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-MessageType: merged

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Angel Pons (Code Review)
Keith Hui (Code Review)
Patrick Georgi (Code Review)
Paul Menzel (Code Review)