Patrick Georgi submitted this change.
sb/intel/i82371eb: Enable upper NVRAM bank
Change-Id: I9ad127ca4394e27fc055ddf03012a195cb03bd94
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
M src/southbridge/intel/i82371eb/bootblock.c
1 file changed, 3 insertions(+), 0 deletions(-)
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index 711b317..581db81 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -61,4 +61,7 @@
reg16 |= LOWER_BIOS_ENABLE | EXT_BIOS_ENABLE | EXT_BIOS_ENABLE_1MB;
reg16 &= ~(WRITE_PROTECT_ENABLE); /* Disable ROM write access. */
pci_write_config16(dev, XBCS, reg16);
+
+ /* Enable (RTC and) upper NVRAM bank. */
+ pci_write_config8(dev, RTCCFG, RTC_POS_DECODE | UPPER_RAM_EN | RTC_ENABLE);
}
To view, visit change 38368. To unsubscribe, or for help writing mail filters, visit settings.