Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/1
diff --git a/src/soc/intel/cannonlake/bootblock/cpu.c b/src/soc/intel/cannonlake/bootblock/cpu.c index f60f319..c96bca8 100644 --- a/src/soc/intel/cannonlake/bootblock/cpu.c +++ b/src/soc/intel/cannonlake/bootblock/cpu.c @@ -14,14 +14,39 @@ * GNU General Public License for more details. */
+#include <arch/cpu.h> +#include <cpu/x86/msr.h> #include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> +#include <intelblocks/rtc.h> +#include <reset.h> #include <soc/bootblock.h>
+#define BIOS_SIGN_ID 0x8B + +static void check_ucode_and_update_top_swap(void) +{ + /* Code to check the MCU version and Update TS */ + msr_t microcode_ver; + unsigned int cpu_id; + microcode_ver.lo = 0; + microcode_ver.hi = 0; + wrmsr(BIOS_SIGN_ID, microcode_ver); + cpu_id = cpu_get_cpuid(); + microcode_ver = rdmsr(BIOS_SIGN_ID); + if (microcode_ver.hi == 0x0) { + configure_rtc_buc_top_swap(TS_DISABLE); + do_board_reset(); + } +} + void bootblock_cpu_init(void) { /* Temporarily cache the memory-mapped boot media. */ if (CONFIG(BOOT_DEVICE_MEMORY_MAPPED) && CONFIG(BOOT_DEVICE_SPI_FLASH)) fast_spi_cache_bios_region(); + + /* Code to check the MCU version and Update TS */ + check_ucode_and_update_top_swap(); }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34656/1/src/soc/intel/cannonlake/bo... File src/soc/intel/cannonlake/bootblock/cpu.c:
https://review.coreboot.org/c/coreboot/+/34656/1/src/soc/intel/cannonlake/bo... PS1, Line 49: trailing whitespace
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#2).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/2
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#3).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/3
Varshit B Pandya has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Removed reviewer Patrick Rudolph.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#4).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/4
Varshit B Pandya has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Removed reviewer Patrick Rudolph.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#5).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/5
Varshit B Pandya has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Removed reviewer Patrick Rudolph.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#6).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 28 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/6
Varshit B Pandya has removed Patrick Rudolph from this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Removed reviewer Patrick Rudolph.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... File src/soc/intel/cannonlake/bootblock/cpu.c:
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... PS6, Line 36: cpu_id = cpu_get_cpuid(); you don't use cpu_id
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... PS6, Line 51: G no need for C preprocessor
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#7).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 23 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/7
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34656
to look at the new patch set (#8).
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
src/soc/intel/cannonlake: Configure top swap based on ucode version
Disable top swap if ucode version is 0(invalid)
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com --- M src/soc/intel/cannonlake/bootblock/cpu.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/8
Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: src/soc/intel/cannonlake: Configure top swap based on ucode version ......................................................................
Patch Set 9:
(2 comments)
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... File src/soc/intel/cannonlake/bootblock/cpu.c:
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... PS6, Line 36: cpu_id = cpu_get_cpuid();
you don't use cpu_id
updated the code
https://review.coreboot.org/c/coreboot/+/34656/6/src/soc/intel/cannonlake/bo... PS6, Line 51: G
no need for C preprocessor
updated the code
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
Set Ready For Review
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
Patch Set 25: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/34656/25/src/soc/intel/common/basec... File src/soc/intel/common/basecode/include/intelbasecode/ucode_update.h:
https://review.coreboot.org/c/coreboot/+/34656/25/src/soc/intel/common/basec... PS25, Line 28: bootblock maybe add "in the bootblock, preferably after console init"
Attention is currently required from: Jamie Ryu. Jamie Ryu has uploaded a new patch set (#26) to the change originally created by Varshit B Pandya. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
soc/intel/common/basecode: Configure top swap based on ucode version
In case of FIT based FW update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: Sugnan Prabhu S sugnan.prabhu.s@intel.com --- M src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/ucode_load_check.c A src/soc/intel/common/basecode/include/intelbasecode/ucode_update.h 3 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/26
Attention is currently required from: Jamie Ryu. Jamie Ryu has uploaded a new patch set (#27) to the change originally created by Varshit B Pandya. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
soc/intel/common/basecode: Configure top swap based on ucode version
In case of FIT based FW update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: Sugnan Prabhu S sugnan.prabhu.s@intel.com --- M src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/ucode_load_check.c A src/soc/intel/common/basecode/include/intelbasecode/ucode_update.h 3 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/27
Attention is currently required from: Jamie Ryu. Jamie Ryu has uploaded a new patch set (#30) to the change originally created by Varshit B Pandya. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
soc/intel/common/basecode: Configure top swap based on ucode version
In case of FIT based FW update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: Sugnan Prabhu S sugnan.prabhu.s@intel.com --- M src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/ucode_load_check.c A src/soc/intel/common/basecode/include/intelbasecode/ucode_update.h 3 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/30
Attention is currently required from: Jamie Ryu. Jamie Ryu has uploaded a new patch set (#31) to the change originally created by Varshit B Pandya. ( https://review.coreboot.org/c/coreboot/+/34656 )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
soc/intel/common/basecode: Configure top swap based on ucode version
In case of FIT based FW update feature is enabled, check that the microcode has been loaded via FIT, if not, then disable top-swap so that RO microcode is loaded on the next boot.
This is to make sure that the system always boots up with a microcode loaded via FIT.
Change-Id: I0ed2ca9e350acf0385ce5d790d319235df6c9f21 Signed-off-by: Pandya, Varshit B varshit.b.pandya@intel.com Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com Signed-off-by: Sugnan Prabhu S sugnan.prabhu.s@intel.com --- M src/soc/intel/common/basecode/fw_update/Makefile.inc A src/soc/intel/common/basecode/fw_update/ucode_load_check.c A src/soc/intel/common/basecode/include/intelbasecode/ucode_update.h 3 files changed, 35 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/34656/31
Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/34656?usp=email )
Change subject: soc/intel/common/basecode: Configure top swap based on ucode version ......................................................................
Abandoned
This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.