Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44234 )
Change subject: cpu/intel/slot_1: Factor out per-CPU Kconfig ......................................................................
cpu/intel/slot_1: Factor out per-CPU Kconfig
All CPU models for this socket select the same options, and this socket is the only one using these CPU models. So, factor Kconfig out.
Change-Id: I09a580850bc8dd9276b94d75c58cdd6382a44e2e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/intel/Kconfig D src/cpu/intel/model_65x/Kconfig D src/cpu/intel/model_67x/Kconfig D src/cpu/intel/model_68x/Kconfig D src/cpu/intel/model_6bx/Kconfig D src/cpu/intel/model_6xx/Kconfig M src/cpu/intel/slot_1/Kconfig 7 files changed, 6 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/44234/1
diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index 43b360b..253e540 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -1,9 +1,4 @@ # CPU models -source "src/cpu/intel/model_6xx/Kconfig" -source "src/cpu/intel/model_65x/Kconfig" -source "src/cpu/intel/model_67x/Kconfig" -source "src/cpu/intel/model_68x/Kconfig" -source "src/cpu/intel/model_6bx/Kconfig" source "src/cpu/intel/model_6ex/Kconfig" source "src/cpu/intel/model_6fx/Kconfig" source "src/cpu/intel/model_1067x/Kconfig" diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig deleted file mode 100644 index a0d1088..0000000 --- a/src/cpu/intel/model_65x/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -config CPU_INTEL_MODEL_65X - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE - select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig deleted file mode 100644 index fb1f102..0000000 --- a/src/cpu/intel/model_67x/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -config CPU_INTEL_MODEL_67X - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE - select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig deleted file mode 100644 index e2f3172..0000000 --- a/src/cpu/intel/model_68x/Kconfig +++ /dev/null @@ -1,10 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-or-later - -config CPU_INTEL_MODEL_68X - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE - select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig deleted file mode 100644 index 30292da..0000000 --- a/src/cpu/intel/model_6bx/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -config CPU_INTEL_MODEL_6BX - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE - select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig deleted file mode 100644 index a833cc7..0000000 --- a/src/cpu/intel/model_6xx/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -config CPU_INTEL_MODEL_6XX - bool - select ARCH_BOOTBLOCK_X86_32 - select ARCH_VERSTAGE_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select CPU_X86_CACHE - select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 4a246fb..db9644b 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -7,11 +7,11 @@
config SLOT_SPECIFIC_OPTIONS # dummy def_bool y - select CPU_INTEL_MODEL_65X - select CPU_INTEL_MODEL_67X - select CPU_INTEL_MODEL_68X - select CPU_INTEL_MODEL_6BX - select CPU_INTEL_MODEL_6XX + select ARCH_BOOTBLOCK_X86_32 + select ARCH_VERSTAGE_X86_32 + select ARCH_ROMSTAGE_X86_32 + select ARCH_RAMSTAGE_X86_32 + select CPU_X86_CACHE select CPU_X86_LAPIC select CPU_X86_MTRR select CPU_X86_SMM @@ -21,6 +21,7 @@ select TSC_MONOTONIC_TIMER select UNKNOWN_TSC_RATE select SETUP_XIP_CACHE + select SUPPORT_CPU_UCODE_IN_CBFS
config DCACHE_RAM_BASE hex
Hello Keith Hui, build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44234
to look at the new patch set (#2).
Change subject: cpu/intel/slot_1: Factor out per-CPU Kconfig ......................................................................
cpu/intel/slot_1: Factor out per-CPU Kconfig
All CPU models for this socket select the same options, and this socket is the only one using these CPU models. So, factor Kconfig out.
Change-Id: I09a580850bc8dd9276b94d75c58cdd6382a44e2e Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/intel/Kconfig D src/cpu/intel/model_65x/Kconfig D src/cpu/intel/model_67x/Kconfig D src/cpu/intel/model_68x/Kconfig D src/cpu/intel/model_6bx/Kconfig D src/cpu/intel/model_6xx/Kconfig M src/cpu/intel/slot_1/Kconfig 7 files changed, 6 insertions(+), 52 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/44234/2
Keith Hui has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44234 )
Change subject: cpu/intel/slot_1: Factor out per-CPU Kconfig ......................................................................
Patch Set 3: Code-Review+1
I thought about this, you made this happen. 😊
Although I would put some other patches in this train first, namely the one unifying 65x/67x and the one unifying 68x/6bx. But timeless binary doesn't change before and after, so you have my vote.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44234 )
Change subject: cpu/intel/slot_1: Factor out per-CPU Kconfig ......................................................................
Patch Set 3:
Patch Set 3: Code-Review+1
I thought about this, you made this happen. 😊
Although I would put some other patches in this train first, namely the one unifying 65x/67x and the one unifying 68x/6bx. But timeless binary doesn't change before and after, so you have my vote.
Thanks for the review! I noticed the redundancy in slot_1 CPUs while I was replacing Makefile with preprocessor, and then handled it. That's why the order is out of whack.
I don't know if you have seen yet, but I'd appreciate some testing on CB:44238 and CB:44239 if possible. The idea is to unify the CPUs in CB:44241 to remove some redundant code.
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44234 )
Change subject: cpu/intel/slot_1: Factor out per-CPU Kconfig ......................................................................
Abandoned
Sorry, I ran out of patience and energy to care about these changes any longer.
-
Angel Pons (Code Review) -
Keith Hui (Code Review)