Patch set updated for coreboot: f51ed29 AMD CIMx SB800: Remove unused function `get_sbdn()`

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3119

-gerrit

commit f51ed298309f817db1624488291a38e4bace922e
Author: Paul Menzel 
Date:   Fri Apr 19 10:23:03 2013 +0200

AMD CIMx SB800: Remove unused function `get_sbdn()`

No SB800 based board uses the function `get_sbdn()`, which
    was probably copied from SB700 code. So remove it.

Just as a test remove some code from AMD model 10xxx. But looking
    at

$ more src/mainboard/asus/m5a88-v/romstage.c
        […]
        #include <lib.h>
        #include <stdint.h>
        #include <string.h>
        #include <device/pci_def.h>
        #include <device/pci_ids.h>
        #include <arch/io.h>
        #include <device/pnp_def.h>
        #include <cpu/x86/lapic.h>
        #include <console/console.h>
        #include <cpu/amd/model_10xxx_rev.h>
        #include "northbridge/amd/amdfam10/raminit.h"
        #include "northbridge/amd/amdfam10/amdfam10.h"
        #include "cpu/x86/lapic/boot_cpu.c"
        #include "northbridge/amd/amdfam10/reset_test.c"
        #include <console/loglevel.h>
        #include "cpu/x86/bist.h"
        #include "superio/ite/it8721f/early_serial.c"
        #include "cpu/x86/mtrr/earlymtrr.c"
        #include <cpu/amd/mtrr.h>
        #include "northbridge/amd/amdfam10/setup_resource_map.c"
        #include "southbridge/amd/rs780/early_setup.c"
        #include <sb_cimx.h>
        #include <SBPLATFORM.h> /* SB OEM constants */
        #include <southbridge/amd/cimx/sb800/smbus.h>
        #include "northbridge/amd/amdfam10/debug.c"

static void activate_spd_rom(const struct mem_controller *ctrl)
        {
        }

static int spd_read_byte(u32 device, u32 address)
        {
                return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
        }

#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
        #include "northbridge/amd/amdfam10/pci.c"
        #include "resourcemap.c"
        #include "cpu/amd/quadcore/quadcore.c"
        #include "cpu/amd/car/post_cache_as_ram.c"
        #include "cpu/amd/microcode/microcode.c"
        #if CONFIG_UPDATE_CPU_MICROCODE
        #include "cpu/amd/model_10xxx/update_microcode.c"
        #endif
        #include "cpu/amd/model_10xxx/init_cpus.c"
        #include "northbridge/amd/amdfam10/early_ht.c"
        #include "spd.h"

#include <reset.h>
        […]

this should be left alone probably as cleaning this mess up is
    going to take a lot of time with no real benefits.

Change-Id: I85fe3db0abf2648b6eb7a659f2112d130f856afa
    Signed-off-by: Paul Menzel 
---
 src/cpu/amd/model_10xxx/init_cpus.c      | 10 ----------
 src/southbridge/amd/cimx/sb800/early.c   | 22 ----------------------
 src/southbridge/amd/cimx/sb800/sb_cimx.h |  8 --------
 3 files changed, 40 deletions(-)

diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index 3d5ddcf..2f0654f 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -905,16 +905,6 @@ static void finalize_node_setup(struct sys_info *sysinfo)
    u8 i;
    u8 nodes = get_nodes();

-#if CONFIG_RAMINIT_SYSINFO
-	u32 reg;
-	/* read Node0 F0_0x64 bit [8:10] to find out SbLink # */
-	reg = pci_read_config32(NODE_HT(0), 0x64);
-	sysinfo->sblk = (reg >> 8) & 7;
-	sysinfo->sbbusn = 0;
-	sysinfo->nodes = nodes;
-	sysinfo->sbdn = get_sbdn(sysinfo->sbbusn);
-#endif
-
    for (i = 0; i < nodes; i++) {
    	cpuSetAMDPCI(i);
    }
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 83087f5..dad215f 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -26,28 +26,6 @@
 #include "cfg.h"		/*sb800_cimx_config*/
 #include "cbmem.h"

-#if CONFIG_RAMINIT_SYSINFO
-/**
- * @brief Get SouthBridge device number
- * @param[in] bus target bus number
- * @return southbridge device number
- */
-u32 get_sbdn(u32 bus)
-{
-	device_t dev;
-
-	printk(BIOS_DEBUG, "SB800 - %s - %s - Start.\n", __FILE__, __func__);
-	//dev = PCI_DEV(bus, 0x14, 0);
-	dev = pci_locate_device_on_bus(
-			PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB800_SM),
-			bus);
-
-	printk(BIOS_DEBUG, "SB800 - %s - %s - End.\n", __FILE__, __func__);
-	return (dev >> 15) & 0x1f;
-}
-#endif
-
-
 /**
  * @brief South Bridge CIMx romstage entry,
  *        wrapper of sbPowerOnInit entry point.
diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h
index 3bec5d8..f07b0e0 100644
--- a/src/southbridge/amd/cimx/sb800/sb_cimx.h
+++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h
@@ -40,12 +40,4 @@ int acpi_is_wakeup_early(void);
  */
 void sb800_clk_output_48Mhz(void);

-#if CONFIG_RAMINIT_SYSINFO
-/**
- * @brief Get SouthBridge device number, called by finalize_node_setup()
- * @param[in] bus target bus number
- * @return southbridge device number
- */
-u32 get_sbdn(u32 bus);
-#endif
 #endif