Change in coreboot[master]: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
The cpu/car code only applies to pre-familiy-17h CPUs that still use cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor code blob binaryPI interface.
Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/cpu/Kconfig M src/soc/amd/common/block/pi/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/47274/1
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 5941599..f6756e1 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -8,3 +8,6 @@ it may not be appropriate for a romstage implementation without additional consideration. If this option is not used, the SOC must implement these functions separately. + This is only used for AMD CPU before family 17h. From family 17h on + the RAM is already initialized by the PSP before the x86 cores are + released from reset. diff --git a/src/soc/amd/common/block/pi/Kconfig b/src/soc/amd/common/block/pi/Kconfig index f0917bb..cf8c79a 100644 --- a/src/soc/amd/common/block/pi/Kconfig +++ b/src/soc/amd/common/block/pi/Kconfig @@ -3,7 +3,8 @@ select HAVE_DEBUG_RAM_SETUP default n help - This option builds functions that interface AMD's AGESA. + This option builds functions that interface AMD's AGESA reference + code packaged in the binaryPI form.
if SOC_AMD_COMMON_BLOCK_PI
Marshall Dawson has uploaded a new patch set (#2) to the change originally created by Felix Held. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
The cpu/car code only applies to pre-family-17h CPUs that still use cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor code blob binaryPI interface.
Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/cpu/Kconfig M src/soc/amd/common/block/pi/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/47274/2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
Patch Set 2: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... File src/soc/amd/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... PS1, Line 7: The teardown procedure does not preserve the stack so : it may not be appropriate for a romstage implementation without : additional consideration. I think this may be outdated now and could come out.
Hello build bot (Jenkins), Jason Glenesk, Marshall Dawson,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47274
to look at the new patch set (#3).
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
The cpu/car code only applies to pre-familiy-17h CPUs that still use cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor code blob binaryPI interface.
Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/cpu/Kconfig M src/soc/amd/common/block/pi/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/47274/3
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... File src/soc/amd/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... PS1, Line 7: The teardown procedure does not preserve the stack so : it may not be appropriate for a romstage implementation without : additional consideration.
I think this may be outdated now and could come out.
haven't verified that and I'd say that change should be done in another patch
Marshall Dawson has uploaded a new patch set (#4) to the change originally created by Felix Held. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
The cpu/car code only applies to pre-family-17h CPUs that still use cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor code blob binaryPI interface.
Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/common/block/cpu/Kconfig M src/soc/amd/common/block/pi/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/47274/4
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... File src/soc/amd/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/47274/1/src/soc/amd/common/block/cp... PS1, Line 7: The teardown procedure does not preserve the stack so : it may not be appropriate for a romstage implementation without : additional consideration.
haven't verified that and I'd say that change should be done in another patch
I was thinking it because all x86 uses postcar now, not that the CAR teardown had been updated.
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47274 )
Change subject: soc/amd/common: add Kconfig help text to pre-family-17h-only blocks ......................................................................
soc/amd/common: add Kconfig help text to pre-family-17h-only blocks
The cpu/car code only applies to pre-family-17h CPUs that still use cache as RAM (CAR) and the PI code only applies to the pre-FSP vendor code blob binaryPI interface.
Change-Id: I5a13d7e202bb745255fabb46110850c36b07de7a Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/47274 Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/cpu/Kconfig M src/soc/amd/common/block/pi/Kconfig 2 files changed, 5 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Marshall Dawson: Looks good to me, approved
diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 5941599..f6756e1 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -8,3 +8,6 @@ it may not be appropriate for a romstage implementation without additional consideration. If this option is not used, the SOC must implement these functions separately. + This is only used for AMD CPU before family 17h. From family 17h on + the RAM is already initialized by the PSP before the x86 cores are + released from reset. diff --git a/src/soc/amd/common/block/pi/Kconfig b/src/soc/amd/common/block/pi/Kconfig index f0917bb..cf8c79a 100644 --- a/src/soc/amd/common/block/pi/Kconfig +++ b/src/soc/amd/common/block/pi/Kconfig @@ -3,7 +3,8 @@ select HAVE_DEBUG_RAM_SETUP default n help - This option builds functions that interface AMD's AGESA. + This option builds functions that interface AMD's AGESA reference + code packaged in the binaryPI form.
if SOC_AMD_COMMON_BLOCK_PI
-
Felix Held (Code Review) -
Marshall Dawson (Code Review)
-
Patrick Georgi (Code Review)