Change in ...coreboot[master]: mediatek/mt8183: allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33391

Change subject: mediatek/mt8183: allow modifying vcore voltage
......................................................................

mediatek/mt8183: allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/1

diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h
index c90e6e4..f213c35 100644
--- a/src/soc/mediatek/mt8183/include/soc/mt6358.h
+++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h
@@ -25,6 +25,9 @@
    PMIC_TOP_TMA_KEY              = 0x03a8,
    PMIC_PWRHOLD                  = 0x0a08,
    PMIC_CPSDSA4                  = 0x0a2e,
+	PMIC_VCORE_OP_EN              = 0x1490,
+	PMIC_VCORE_DBG0               = 0x149e,
+	PMIC_VCORE_VOSEL              = 0x14aa,
    PMIC_VDRAM1_VOSEL_SLEEP       = 0x160a,
    PMIC_VDRAM1_OP_EN             = 0x1610,
    PMIC_VDRAM1_DBG0              = 0x161e,
@@ -43,5 +46,7 @@
 void pmic_set_power_hold(bool enable);
 unsigned int pmic_get_vdram1_vol(void);
 void pmic_set_vdram1_vol(unsigned int vdram_uv);
+unsigned int pmic_get_vcore_vol(void);
+void pmic_set_vcore_vol(unsigned int vcore_uv);

#endif /* __SOC_MEDIATEK_MT6358_H__ */
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index 409369f..eff0543 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -756,6 +756,29 @@
    pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0);
 }

+unsigned int pmic_get_vcore_vol(void)
+{
+	unsigned int vol_reg;
+
+	vol_reg = pwrap_read_field(PMIC_VCORE_DBG0, 0x7F, 0);
+	return 500000 + vol_reg * 6250;
+}
+
+void pmic_set_vcore_vol(unsigned int vcore_uv)
+{
+	unsigned int vol_reg;
+
+	if (vcore_uv < 500000)
+		vol_reg = 0;
+	else if (vcore_uv > 1100000)
+		vol_reg = 0x60;
+	else
+		vol_reg = (vcore_uv - 500000) / 6250;
+
+	pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0);
+	pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0);
+}
+
 static void pmic_wdt_set(void)
 {
    /* [5]=1, RG_WDTRSTB_DEB */

[You-Cheng Syu (Code Review)]

You-Cheng Syu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: allow modifying vcore voltage
......................................................................

Patch Set 1: Code-Review+1

(1 comment)

https://review.coreboot.org/#/c/33391/1/src/soc/mediatek/mt8183/mt6358.c 
File src/soc/mediatek/mt8183/mt6358.c:

https://review.coreboot.org/#/c/33391/1/src/soc/mediatek/mt8183/mt6358.c@771 
PS1, Line 771: 500000
I would prefer having some constants for these values (e.g., 500000, 1100000).
But this is also okay.

Change in coreboot[master]: mediatek/mt8183: allow modifying vcore voltage

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: allow modifying vcore voltage
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/33391/2//COMMIT_MSG@7 
PS2, Line 7: allow
Allow

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

Hello Yu-Ping Wu, Julius Werner, You-Cheng Syu, Tristan Hsieh, Huayang Duan, Hung-Te Lin, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33391

to look at the new patch set (#3).

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/3

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/33391/2//COMMIT_MSG@7 
PS2, Line 7: allow
> Allow

Done

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 3:

This change is ready for review.

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

Hello Yu-Ping Wu, Julius Werner, You-Cheng Syu, Tristan Hsieh, Huayang Duan, Hung-Te Lin, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33391

to look at the new patch set (#4).

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/4

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has uploaded a new patch set (#5) to the change originally created by hsin-hsiung wang. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/5

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

Hello Yu-Ping Wu, Julius Werner, You-Cheng Syu, Tristan Hsieh, Huayang Duan, Hung-Te Lin, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/33391

to look at the new patch set (#6).

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/6

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/1/src/soc/mediatek/mt8183/mt6... 
File src/soc/mediatek/mt8183/mt6358.c:

https://review.coreboot.org/c/coreboot/+/33391/1/src/soc/mediatek/mt8183/mt6... 
PS1, Line 771: 500000
> I would prefer having some constants for these values (e.g., 500000, 1100000). […]

Ack

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Yu-Ping Wu (Code Review)]

Yu-Ping Wu has uploaded a new patch set (#12) to the change originally created by hsin-hsiung wang. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 26 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/33391/12

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Hung-Te Lin (Code Review)]

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 14: Code-Review+2

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Hung-Te Lin (Code Review)]

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 14: -Code-Review

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
File src/soc/mediatek/mt8183/mt6358.c:

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
PS14, Line 816: vcore_uv
Julius asked if it's really needed to use uv since most Coreboot code sets voltage in mv.
Can MTK answer that, or change to code to mv?

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 14:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
File src/soc/mediatek/mt8183/mt6358.c:

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
PS14, Line 816: vcore_uv
> Julius asked if it's really needed to use uv since most Coreboot code sets voltage in mv. […]

Hi Julius/Hungte,
According to the patch 35017, LP4X_DDR3200 needs 762.5 mv for vcore.
I think it's batter to use uv for vcore.

Thanks.

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 14:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
File src/soc/mediatek/mt8183/mt6358.c:

https://review.coreboot.org/c/coreboot/+/33391/14/src/soc/mediatek/mt8183/mt... 
PS14, Line 816: vcore_uv
> Hi Julius/Hungte, […]

Ack

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Hung-Te Lin (Code Review)]

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

Patch Set 14: Code-Review+2

Change in coreboot[master]: mediatek/mt8183: Allow modifying vcore voltage

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/33391 )

Change subject: mediatek/mt8183: Allow modifying vcore voltage
......................................................................

mediatek/mt8183: Allow modifying vcore voltage

Because vcore is the power of ddrphy in the soc, DRAM DVFS needs to be
calibrated with different vcore voltages to get correct parameters.
A new API is added to allow changing vcore voltage.

BUG=b:80501386
BRANCH=none
TEST=measure vcore voltage with multimeter

Change-Id: Ic43d5efe7e597121775dc853a3e2a08ebc59657d
Signed-off-by: Hsin-Hsiung Wang 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33391
Reviewed-by: Hung-Te Lin 
Tested-by: build bot (Jenkins) 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 26 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Hung-Te Lin: Looks good to me, approved

diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h
index 19ab5e1..bb5f019 100644
--- a/src/soc/mediatek/mt8183/include/soc/mt6358.h
+++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h
@@ -25,6 +25,9 @@
    PMIC_TOP_TMA_KEY              = 0x03a8,
    PMIC_PWRHOLD                  = 0x0a08,
    PMIC_CPSDSA4                  = 0x0a2e,
+	PMIC_VCORE_OP_EN              = 0x1490,
+	PMIC_VCORE_DBG0               = 0x149e,
+	PMIC_VCORE_VOSEL              = 0x14aa,
    PMIC_VDRAM1_VOSEL_SLEEP       = 0x160a,
    PMIC_SMPS_ANA_CON0            = 0x1808,
    PMIC_VSIM2_ANA_CON0           = 0x1e30,
@@ -41,5 +44,7 @@
 void pmic_set_power_hold(bool enable);
 void pmic_set_vsim2_cali(unsigned int vsim2_mv);
 void pmic_init_scp_voltage(void);
+unsigned int pmic_get_vcore_vol(void);
+void pmic_set_vcore_vol(unsigned int vcore_uv);

#endif /* __SOC_MEDIATEK_MT6358_H__ */
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index fa928cb..3600b6a 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -805,6 +805,27 @@
    pwrap_write_field(PMIC_VSIM2_ANA_CON0, cali_mv / 10, 0xF, 0);
 }

+unsigned int pmic_get_vcore_vol(void)
+{
+	unsigned int vol_reg;
+
+	vol_reg = pwrap_read_field(PMIC_VCORE_DBG0, 0x7F, 0);
+	return 500000 + vol_reg * 6250;
+}
+
+void pmic_set_vcore_vol(unsigned int vcore_uv)
+{
+	unsigned int vol_reg;
+
+	assert(vcore_uv >= 500000);
+	assert(vcore_uv <= 1100000);
+
+	vol_reg = (vcore_uv - 500000) / 6250;
+
+	pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0);
+	pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0);
+}
+
 static void pmic_wdt_set(void)
 {
    /* [5]=1, RG_WDTRSTB_DEB */