mturney mturney has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
trogdor: libpayload uart/serial driver support
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org --- M payloads/libpayload/Kconfig A payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/sc7180.c 4 files changed, 292 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/1
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 97b970b..aa044bd 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -263,6 +263,16 @@ depends on SERIAL_CONSOLE default n
+config SC7180_SERIAL_CONSOLE + bool "SC7180 SOC compatible serial port driver" + depends on SERIAL_CONSOLE + default n + +config CONSOLE_UART_ADDR + hex "Default I/O base for the serial port" + depends on SC7180_SERIAL_CONSOLE + default 0x00A88000 + config PL011_SERIAL_CONSOLE bool "PL011 compatible serial port driver" depends on 8250_SERIAL_CONSOLE diff --git a/payloads/libpayload/configs/config.trogdor b/payloads/libpayload/configs/config.trogdor new file mode 100644 index 0000000..0625ff5 --- /dev/null +++ b/payloads/libpayload/configs/config.trogdor @@ -0,0 +1,5 @@ +CONFIG_LP_CHROMEOS=y +CONFIG_LP_ARCH_ARM64=y +CONFIG_LP_TIMER_ARM64_ARCH=y +CONFIG_LP_SERIAL_CONSOLE=y +CONFIG_LP_SC7180_SERIAL_CONSOLE=y diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index b4e7594..701434d 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -38,6 +38,7 @@ libc-$(CONFIG_LP_IPQ806X_SERIAL_CONSOLE) += serial/ipq806x.c serial/serial.c libc-$(CONFIG_LP_IPQ40XX_SERIAL_CONSOLE) += serial/ipq40xx.c serial/serial.c libc-$(CONFIG_LP_QCS405_SERIAL_CONSOLE) += serial/qcs405.c serial/serial.c +libc-$(CONFIG_LP_SC7180_SERIAL_CONSOLE) += serial/sc7180.c serial/serial.c libc-$(CONFIG_LP_PC_KEYBOARD) += i8042/keyboard.c libc-$(CONFIG_LP_PC_MOUSE) += i8042/mouse.c libc-$(CONFIG_LP_PC_I8042) += i8042/i8042.c diff --git a/payloads/libpayload/drivers/serial/sc7180.c b/payloads/libpayload/drivers/serial/sc7180.c new file mode 100644 index 0000000..d104cd6 --- /dev/null +++ b/payloads/libpayload/drivers/serial/sc7180.c @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2010-2012, 2014, 2016, 2019, The Linux Foundation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of The Linux Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <libpayload.h> + +/* For simplicity sake let's rely on coreboot initalizing the UART. */ +#include <sys/types.h> +#include <config.h> + +#define true 1 +#define false 0 +typedef uint8_t bool; + +#define REG_IN(base, offset) (*(volatile unsigned int *)(base + offset)) + +#define REG_OUT(base, offset, value) \ + (*(volatile unsigned int *)(base + offset) = value) + +/* BASE ADDRESS OF DIFFERENT REGISTER SPACES IN HW */ + +#define GENI4_CFG 0x0 +#define GENI4_IMAGE_REGS 0x100 +#define GENI4_DATA 0x600 +#define QUPV3_SE_DMA 0xC00 +#define GENI4_IMAGE 0x1000 +#define QUPV3_SEC 0x2000 + +/* COMMON STATUS/CONFIGURATION REGISTERS AND MASKS */ + +#define SE_HW_PARAM_0_REG (QUPV3_SE_DMA + 0x00000224) +#define SE_HW_PARAM_0_TX_FIFO_DEPTH_MASK 0x3f0000 +#define SE_HW_PARAM_0_TX_FIFO_DEPTH_SHIFT 0x10 + +#define SE_HW_PARAM_1_REG (QUPV3_SE_DMA + 0x00000228) +#define SE_HW_PARAM_1_RX_FIFO_DEPTH_MASK 0x3f0000 +#define SE_HW_PARAM_1_RX_FIFO_DEPTH_SHIFT 0x10 + +#define GENI_FW_REVISION_RO_REG (GENI4_CFG + 0x00000068) +#define GENI_FW_REVISION_RO_PROTOCOL_MASK 0x0000FF00 +#define GENI_FW_REVISION_RO_PROTOCOL_SHIFT 0x00000008 + +#define GENI_SER_M_CLK_CFG_REG (GENI4_CFG + 0x00000048) +#define GENI_SER_S_CLK_CFG_REG (GENI4_CFG + 0x0000004c) + +#define GENI_STATUS_REG (GENI4_CFG + 0x00000040) +#define GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 0x1 +#define GENI_STATUS_S_GENI_CMD_ACTIVE_MASK 0x1000 + +#define GENI_TX_WATERMARK_REG (GENI4_DATA + 0x0000020c) +#define GENI_RX_WATERMARK_REG (GENI4_DATA + 0x00000210) +#define GENI_RX_RFR_WATERMARK_REG (GENI4_DATA + 0x00000214) + +#define UART_TX_WORD_LEN_REG (GENI4_IMAGE_REGS + 0x00000168) +#define UART_RX_WORD_LEN_REG (GENI4_IMAGE_REGS + 0x0000018c) + +#define UART_TX_PARITY_CFG_REG (GENI4_IMAGE_REGS + 0x000001a4) +#define UART_TX_TRANS_CFG_REG (GENI4_IMAGE_REGS + 0x0000015c) +#define UART_RX_PARITY_CFG_REG (GENI4_IMAGE_REGS + 0x000001a8) +#define UART_RX_TRANS_CFG_REG (GENI4_IMAGE_REGS + 0x00000180) + +#define UART_TX_STOP_BIT_LEN_REG (GENI4_IMAGE_REGS + 0x0000016c) + +#define UART_RX_STALE_CNT_REG (GENI4_IMAGE_REGS + 0x00000194) + +#define GENI_TX_PACKING_CFG0_REG (GENI4_IMAGE_REGS + 0x00000160) +#define GENI_TX_PACKING_CFG1_REG (GENI4_IMAGE_REGS + 0x00000164) +#define GENI_RX_PACKING_CFG0_REG (GENI4_IMAGE_REGS + 0x00000184) +#define GENI_RX_PACKING_CFG1_REG (GENI4_IMAGE_REGS + 0x00000188) + +#define UART_TX_TRANS_LEN_REG (GENI4_IMAGE_REGS + 0x00000170) + +/* FIFO, STATUS REGISTERS AND MASKS */ + +#define GENI_TX_FIFOn_REG (GENI4_DATA + 0x00000100) +#define GENI_RX_FIFOn_REG (GENI4_DATA + 0x00000180) + +#define GENI_TX_FIFO_STATUS_REG (GENI4_DATA + 0x00000200) +#define GENI_TX_FIFO_STATUS_TX_FIFO_WC_MASK 0xfffffff + +#define GENI_RX_FIFO_STATUS_REG (GENI4_DATA + 0x00000204) +#define GENI_RX_FIFO_STATUS_RX_LAST_VALID_BYTES_MASK 0x70000000 +#define GENI_RX_FIFO_STATUS_RX_LAST_VALID_BYTES_SHIFT 0x1c +#define GENI_RX_FIFO_STATUS_RX_FIFO_WC_MASK 0x1ffffff +#define GENI_RX_FIFO_STATUS_RX_FIFO_WC_SHIFT 0x0 + +/* MASTER/TX ENGINE REGISTERS */ + +#define GENI_M_CMD0_REG (GENI4_DATA + 0x00000000) + +/* SECONDARY/RX ENGINE REGISTERS */ + +#define GENI_S_CMD0_REG (GENI4_DATA + 0x00000030) + +#define TX_WATERMARK_MARGIN 4 /* Represented in words */ +#define RX_WATERMARK_MARGIN 8 /* Represented in words */ +#define RX_RFR_WATERMARK_MARGIN 4 /* Represented in words */ + +#define PROTOCOL_UART 0x2 + +static struct console_input_driver consin = { + .next = 0, + .input_type = 0, +}; + +static struct console_output_driver consout = { + .next = 0, +}; + +static bool uart_initialized = false; + +static bool uart_qupv3_init(void); +static unsigned char uart_qupv3_rx_byte(void); +static void uart_qupv3_tx_byte(unsigned char data); + +uintptr_t uart_platform_base(int idx); + +static bool uart_qupv3_init(void) +{ + uintptr_t base = uart_platform_base(0); + unsigned int reg_value; + + reg_value = REG_IN(base, GENI_FW_REVISION_RO_REG); + reg_value &= GENI_FW_REVISION_RO_PROTOCOL_MASK; + reg_value >>= GENI_FW_REVISION_RO_PROTOCOL_SHIFT; + + if (reg_value != PROTOCOL_UART) + return false; + + /* + * If the RX (secondary) sequencer is already active, it means the core + * has been already initialized in the previous stage. Skip + * configuration + */ + if (REG_IN(base, GENI_STATUS_REG) & + GENI_STATUS_S_GENI_CMD_ACTIVE_MASK) { + uart_initialized = true; + return true; + } + + REG_OUT(base, GENI_TX_WATERMARK_REG, TX_WATERMARK_MARGIN); + + /* To get RX FIFO size */ + reg_value = REG_IN(base, SE_HW_PARAM_1_REG); + reg_value &= SE_HW_PARAM_1_RX_FIFO_DEPTH_MASK; + reg_value >>= SE_HW_PARAM_1_RX_FIFO_DEPTH_SHIFT; + + REG_OUT(base, GENI_RX_WATERMARK_REG, reg_value - RX_WATERMARK_MARGIN); + + REG_OUT(base, GENI_RX_RFR_WATERMARK_REG, + reg_value - RX_RFR_WATERMARK_MARGIN); + + REG_OUT(base, UART_TX_WORD_LEN_REG, 0x8); + REG_OUT(base, UART_RX_WORD_LEN_REG, 0x8); + + REG_OUT(base, UART_TX_PARITY_CFG_REG, 0x0); + REG_OUT(base, UART_TX_TRANS_CFG_REG, 0x2); + REG_OUT(base, UART_RX_PARITY_CFG_REG, 0x0); + REG_OUT(base, UART_RX_TRANS_CFG_REG, 0x0); + + REG_OUT(base, UART_TX_STOP_BIT_LEN_REG, 0x0); + + REG_OUT(base, UART_RX_STALE_CNT_REG, 0x16 * 10); + + REG_OUT(base, GENI_TX_PACKING_CFG0_REG, 0x4380E); + REG_OUT(base, GENI_TX_PACKING_CFG1_REG, 0xC3E0E); + REG_OUT(base, GENI_RX_PACKING_CFG0_REG, 0xF); + REG_OUT(base, GENI_RX_PACKING_CFG1_REG, 0x0); + + REG_OUT(base, GENI_S_CMD0_REG, 0x8000000); + + uart_initialized = true; + return true; +} + +unsigned char uart_qupv3_rx_byte(void) +{ + uintptr_t base = uart_platform_base(0); + unsigned char data; + + if (uart_initialized) { + if (REG_IN(base, GENI_RX_FIFO_STATUS_REG) & + GENI_RX_FIFO_STATUS_RX_FIFO_WC_MASK) { + data = (unsigned char)REG_IN(base, GENI_RX_FIFOn_REG) & + 0xFF; + return data; + } + } + return 0x0; +} + +void uart_qupv3_tx_byte(unsigned char data) +{ + uintptr_t base = uart_platform_base(0); + + if (uart_initialized == false) { + if (!uart_qupv3_init()) + return; + } + + while (REG_IN(base, GENI_STATUS_REG) & + GENI_STATUS_M_GENI_CMD_ACTIVE_MASK) + ; + + REG_OUT(base, UART_TX_TRANS_LEN_REG, 1); + REG_OUT(base, GENI_M_CMD0_REG, 0x08000000); + REG_OUT(base, GENI_TX_FIFOn_REG, (unsigned int)data); +} + +uintptr_t uart_platform_base(int idx) +{ + return CONFIG_LP_CONSOLE_UART_ADDR; +} + +void serial_putchar(unsigned int data) +{ + if (data == 0xa) + uart_qupv3_tx_byte(0xd); + uart_qupv3_tx_byte(data); +} + +int serial_havechar(void) +{ + uintptr_t base = uart_platform_base(0); + + if (uart_initialized) { + if (REG_IN(base, GENI_RX_FIFO_STATUS_REG) & + GENI_RX_FIFO_STATUS_RX_FIFO_WC_MASK) { + return 1; + } + } + return 0; +} + +int serial_getchar(void) +{ + return uart_qupv3_rx_byte(); +} + +void serial_console_init(void) +{ + uart_qupv3_init(); + + consout.putchar = &serial_putchar; + console_add_output_driver(&consout); + + consin.havekey = &serial_havechar; + consin.getchar = &serial_getchar; + console_add_input_driver(&consin); +}
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 5:
(6 comments)
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig File payloads/libpayload/Kconfig:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig... PS5, Line 267: bool "SC7180 SOC compatible serial port driver" Since it seems that this driver works for multiple Qualcomm SoCs, should we maybe give it a more generic name (e.g. QUALCOMM_QUPV3_SERIAL_CONSOLE or something like that)? Applies to the filename as well.
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig... PS5, Line 271: config CONSOLE_UART Not necessary since we have the base address in the coreboot table instead.
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... File payloads/libpayload/drivers/serial/qcom_qup_se.c:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 33: struct qup_regs *qup[12] = { This shouldn't be necessary since we can get the QUP base address from the coreboot table.
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... File payloads/libpayload/drivers/serial/sc7180.c:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 101: struct qup_regs *regs = qup[idx]; You should do
struct qup_regs *regs = (void *)(uintptr_t)lib_sysinfo.serial->baseaddr;
instead. (Might wanna put that in a helper function or macro since you'll need it a lot.)
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 115: { You should check
if (!lib_sysinfo.serial) return;
before registering the drivers here.
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/include... File payloads/libpayload/include/qcom_qup_se.h:
PS5: Since we'll only have the UART driver and no other QUP-related stuff in libpayload, I think it would be better to just inline all of these definitions in serial/sc7180.c.
Roja Rani Yarubandi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 5:
(6 comments)
Patch Set 5:
(6 comments)
Will share the patch with Mike soon
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig File payloads/libpayload/Kconfig:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig... PS5, Line 267: bool "SC7180 SOC compatible serial port driver"
Since it seems that this driver works for multiple Qualcomm SoCs, should we maybe give it a more gen […]
Done
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/Kconfig... PS5, Line 271: config CONSOLE_UART
Not necessary since we have the base address in the coreboot table instead.
Done
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... File payloads/libpayload/drivers/serial/qcom_qup_se.c:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 33: struct qup_regs *qup[12] = {
This shouldn't be necessary since we can get the QUP base address from the coreboot table.
Done
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... File payloads/libpayload/drivers/serial/sc7180.c:
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 101: struct qup_regs *regs = qup[idx];
You should do […]
Done
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/drivers... PS5, Line 115: {
You should check […]
Done
https://review.coreboot.org/c/coreboot/+/35960/5/payloads/libpayload/include... File payloads/libpayload/include/qcom_qup_se.h:
PS5:
Since we'll only have the UART driver and no other QUP-related stuff in libpayload, I think it would […]
Done
Hello Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35960
to look at the new patch set (#7).
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
trogdor: libpayload uart/serial driver support
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig A payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 353 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/7
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 7: Code-Review+2
Hello Julius Werner, Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35960
to look at the new patch set (#13).
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
trogdor: libpayload uart/serial driver support
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 350 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/13
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 13: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 21:
(3 comments)
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG@7 PS21, Line 7: trogdor: libpayload uart/serial driver support Please make it a statement, and prefix with libpayload:
libpayload: Add UART/serial driver for trogdor
Even:
libpayload: Add Qualcomm QUPV3 UART/serial driver
Tested-on: trogdor
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 2: . Can be removed.
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 287: GENI_STATUS_M_GENI_CMD_ACTIVE_MASK) Fits on one line now.
Roja Rani Yarubandi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 25:
(3 comments)
Patch Set 21:
(3 comments)
Done the changes, shared patch with Mike to push
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG@7 PS21, Line 7: trogdor: libpayload uart/serial driver support
Please make it a statement, and prefix with libpayload: […]
Done
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 2: .
Can be removed.
Done
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 287: GENI_STATUS_M_GENI_CMD_ACTIVE_MASK)
Fits on one line now.
Done
Ravi kumar has uploaded a new patch set (#26) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
trogdor: libpayload uart/serial driver support
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/26
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 26:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35960/26/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/26/payloads/libpayload/driver... PS26, Line 286: while (read32(®s->geni_status) & trailing statements should be on next line
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 27:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35960/27/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/27/payloads/libpayload/driver... PS27, Line 32: /* For simplicity sake let's rely on coreboot initalizing the UART. */ 'initalizing' may be misspelled - perhaps 'initializing'?
https://review.coreboot.org/c/coreboot/+/35960/27/payloads/libpayload/driver... PS27, Line 286: while (read32(®s->geni_status) & trailing statements should be on next line
Hello Julius Werner, Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35960
to look at the new patch set (#28).
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
trogdor: libpayload uart/serial driver support
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/28
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 29: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 29:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG@7 PS21, Line 7: trogdor: libpayload uart/serial driver support
Done
It was reverted again.
mturney mturney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: trogdor: libpayload uart/serial driver support ......................................................................
Patch Set 29:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/35960/21//COMMIT_MSG@7 PS21, Line 7: trogdor: libpayload uart/serial driver support
It was reverted again.
Done
Hello Julius Werner, Ravi kumar, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35960
to look at the new patch set (#30).
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
libpayload: Add uart/serial driver support for trogdor
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/30
Ravi kumar has uploaded a new patch set (#35) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
libpayload: Add uart/serial driver support for trogdor
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 349 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/35960/35
Roja Rani Yarubandi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 35:
Hi all, Anything more to be done? Can this patch be approved?
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 35: Code-Review+2
Yes, I already approved patch set 29, I'm just sometimes too lazy to go through the whole list and re-approve everything after every new upload. You can reorder this patch to the front of the patch train if you want, then we can land it immediately.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 35:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 314: if (data == 0xa) Why is this data special?
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 316: uart_qupv3_tx_byte(data); If you want:
uart_qupv3_tx_byte((data == 0xa) ? 0xd : data);
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 35:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 314: if (data == 0xa)
Why is this data special?
This is a newline... if you look through the serial drivers, you can see that pretty much all of them insert carriage returns in front of newlines (because that's what you need to make it look right on a serial terminal). We could write '\r' and '\n' instead of 0xa and 0xd here to make that more obvious.
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 316: uart_qupv3_tx_byte(data);
If you want: […]
That is not what this does, there's no 'else' up there. If the character is a newline it will print a carriage return in front of it, but it will still print the newline as well.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 35:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 314: if (data == 0xa)
This is a newline... […]
Ack
https://review.coreboot.org/c/coreboot/+/35960/35/payloads/libpayload/driver... PS35, Line 316: uart_qupv3_tx_byte(data);
That is not what this does, there's no 'else' up there. […]
Ack
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 36:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... File payloads/libpayload/drivers/serial/qcom_qupv3_serial.c:
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 2: .
Done
Done
https://review.coreboot.org/c/coreboot/+/35960/21/payloads/libpayload/driver... PS21, Line 287: GENI_STATUS_M_GENI_CMD_ACTIVE_MASK)
Done
Done
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
libpayload: Add uart/serial driver support for trogdor
Change-Id: I5be3904298cd88c60dbc6d8d662beeede2abe442 Signed-off-by: T Michael Turney mturney@codeaurora.org Signed-off-by: Roja Rani Yarubandi rojay@codeaurora.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/35960 Reviewed-by: Julius Werner jwerner@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M payloads/libpayload/Kconfig M payloads/libpayload/configs/config.trogdor M payloads/libpayload/drivers/Makefile.inc A payloads/libpayload/drivers/serial/qcom_qupv3_serial.c 4 files changed, 349 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved
diff --git a/payloads/libpayload/Kconfig b/payloads/libpayload/Kconfig index 36f4af5..f8e176e 100644 --- a/payloads/libpayload/Kconfig +++ b/payloads/libpayload/Kconfig @@ -257,6 +257,11 @@ depends on SERIAL_CONSOLE default n
+config QUALCOMM_QUPV3_SERIAL_CONSOLE + bool "Qualcomm QUPV3 serial port driver" + depends on SERIAL_CONSOLE + default n + config PL011_SERIAL_CONSOLE bool "PL011 compatible serial port driver" depends on 8250_SERIAL_CONSOLE diff --git a/payloads/libpayload/configs/config.trogdor b/payloads/libpayload/configs/config.trogdor index 413f66ff..6309d2b 100644 --- a/payloads/libpayload/configs/config.trogdor +++ b/payloads/libpayload/configs/config.trogdor @@ -4,3 +4,5 @@ CONFIG_LP_USB=y CONFIG_LP_USB_EHCI=y CONFIG_LP_USB_XHCI=y +CONFIG_LP_SERIAL_CONSOLE=y +CONFIG_LP_QUALCOMM_QUPV3_SERIAL_CONSOLE=y diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index a391670..115cf40 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -38,6 +38,7 @@ libc-$(CONFIG_LP_IPQ806X_SERIAL_CONSOLE) += serial/ipq806x.c serial/serial.c libc-$(CONFIG_LP_IPQ40XX_SERIAL_CONSOLE) += serial/ipq40xx.c serial/serial.c libc-$(CONFIG_LP_QCS405_SERIAL_CONSOLE) += serial/qcs405.c serial/serial.c +libc-$(CONFIG_LP_QUALCOMM_QUPV3_SERIAL_CONSOLE) += serial/qcom_qupv3_serial.c serial/serial.c libc-$(CONFIG_LP_PC_KEYBOARD) += i8042/keyboard.c libc-$(CONFIG_LP_PC_MOUSE) += i8042/mouse.c libc-$(CONFIG_LP_PC_I8042) += i8042/i8042.c diff --git a/payloads/libpayload/drivers/serial/qcom_qupv3_serial.c b/payloads/libpayload/drivers/serial/qcom_qupv3_serial.c new file mode 100644 index 0000000..9100a27 --- /dev/null +++ b/payloads/libpayload/drivers/serial/qcom_qupv3_serial.c @@ -0,0 +1,341 @@ +/* + * This file is part of the libpayload project. + * Copyright (c) 2020 Qualcomm Technologies. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * * Neither the name of The Linux Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN + * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + + +/* For simplicity sake let's rely on coreboot initializing the UART. */ +#include <config.h> +#include <libpayload.h> +#include <sys/types.h> + +#define GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 0x1 +#define RX_FIFO_WC_MSK 0x1FFFFFF +#define START_UART_TX 0x8000000 + +union proto_word_len { + u32 uart_tx_word_len; + u32 spi_word_len; +}; + +union proto_tx_trans_len { + u32 uart_tx_stop_bit_len; + u32 i2c_tx_trans_len; + u32 spi_tx_trans_len; +}; + +union proto_rx_trans_len { + u32 uart_tx_trans_len; + u32 i2c_rx_trans_len; + u32 spi_rx_trans_len; +}; + +struct qup_regs { + u32 geni_init_cfg_revision; + u32 geni_s_init_cfg_revision; + u8 _reserved1[0x10 - 0x08]; + u32 geni_general_cfg; + u32 geni_rx_fifo_ctrl; + u8 _reserved2[0x20 - 0x18]; + u32 geni_force_default_reg; + u32 geni_output_ctrl; + u32 geni_cgc_ctrl; + u32 geni_char_cfg; + u32 geni_char_data_n; + u8 _reserved3[0x40 - 0x34]; + u32 geni_status; + u32 geni_test_bus_ctrl; + u32 geni_ser_m_clk_cfg; + u32 geni_ser_s_clk_cfg; + u32 geni_prog_rom_ctrl_reg; + u8 _reserved4[0x60 - 0x54]; + u32 geni_clk_ctrl_ro; + u32 fifo_if_disable_ro; + u32 geni_fw_revision_ro; + u32 geni_s_fw_revision_ro; + u32 geni_fw_multilock_protns_ro; + u32 geni_fw_multilock_msa_ro; + u32 geni_fw_multilock_sp_ro; + u32 geni_clk_sel; + u32 geni_dfs_if_cfg; + u8 _reserved5[0x100 - 0x084]; + u32 geni_cfg_reg0; + u32 geni_cfg_reg1; + u32 geni_cfg_reg2; + u32 geni_cfg_reg3; + u32 geni_cfg_reg4; + u32 geni_cfg_reg5; + u32 geni_cfg_reg6; + u32 geni_cfg_reg7; + u32 geni_cfg_reg8; + u32 geni_cfg_reg9; + u32 geni_cfg_reg10; + u32 geni_cfg_reg11; + u32 geni_cfg_reg12; + u32 geni_cfg_reg13; + u32 geni_cfg_reg14; + u32 geni_cfg_reg15; + u32 geni_cfg_reg16; + u32 geni_cfg_reg17; + u32 geni_cfg_reg18; + u8 _reserved6[0x200 - 0x14C]; + u32 geni_cfg_reg64; + u32 geni_cfg_reg65; + u32 geni_cfg_reg66; + u32 geni_cfg_reg67; + u32 geni_cfg_reg68; + u32 geni_cfg_reg69; + u32 geni_cfg_reg70; + u32 geni_cfg_reg71; + u32 geni_cfg_reg72; + u32 spi_cpha; + u32 geni_cfg_reg74; + u32 proto_loopback_cfg; + u32 spi_cpol; + u32 i2c_noise_cancellation_ctl; + u32 i2c_monitor_ctl; + u32 geni_cfg_reg79; + u32 geni_cfg_reg80; + u32 geni_cfg_reg81; + u32 geni_cfg_reg82; + u32 spi_demux_output_inv; + u32 spi_demux_sel; + u32 geni_byte_granularity; + u32 geni_dma_mode_en; + u32 uart_tx_trans_cfg_reg; + u32 geni_tx_packing_cfg0; + u32 geni_tx_packing_cfg1; + union proto_word_len word_len; + union proto_tx_trans_len tx_trans_len; + union proto_rx_trans_len rx_trans_len; + u32 spi_pre_post_cmd_dly; + u32 i2c_scl_counters; + u32 geni_cfg_reg95; + u32 uart_rx_trans_cfg; + u32 geni_rx_packing_cfg0; + u32 geni_rx_packing_cfg1; + u32 uart_rx_word_len; + u32 geni_cfg_reg100; + u32 uart_rx_stale_cnt; + u32 geni_cfg_reg102; + u32 geni_cfg_reg103; + u32 geni_cfg_reg104; + u32 uart_tx_parity_cfg; + u32 uart_rx_parity_cfg; + u32 uart_manual_rfr; + u32 geni_cfg_reg108; + u32 geni_cfg_reg109; + u32 geni_cfg_reg110; + u8 _reserved7[0x600 - 0x2BC]; + u32 geni_m_cmd0; + u32 geni_m_cmd_ctrl_reg; + u8 _reserved8[0x10 - 0x08]; + u32 geni_m_irq_status; + u32 geni_m_irq_enable; + u32 geni_m_irq_clear; + u32 geni_m_irq_en_set; + u32 geni_m_irq_en_clear; + u32 geni_m_cmd_err_status; + u32 geni_m_fw_err_status; + u8 _reserved9[0x30 - 0x2C]; + u32 geni_s_cmd0; + u32 geni_s_cmd_ctrl_reg; + u8 _reserved10[0x40 - 0x38]; + u32 geni_s_irq_status; + u32 geni_s_irq_enable; + u32 geni_s_irq_clear; + u32 geni_s_irq_en_set; + u32 geni_s_irq_en_clear; + u8 _reserved11[0x700 - 0x654]; + u32 geni_tx_fifon; + u8 _reserved12[0x780 - 0x704]; + u32 geni_rx_fifon; + u8 _reserved13[0x800 - 0x784]; + u32 geni_tx_fifo_status; + u32 geni_rx_fifo_status; + u32 geni_tx_fifo_threshold; + u32 geni_tx_watermark_reg; + u32 geni_rx_watermark_reg; + u32 geni_rx_rfr_watermark_reg; + u8 _reserved14[0x900 - 0x818]; + u32 geni_gp_output_reg; + u8 _reserved15[0x908 - 0x904]; + u32 geni_ios; + u32 geni_timestamp; + u32 geni_m_gp_length; + u32 geni_s_gp_length; + u8 _reserved16[0x920 - 0x918]; + u32 geni_hw_irq_en; + u32 geni_hw_irq_ignore_on_active; + u8 _reserved17[0x930 - 0x928]; + u32 geni_hw_irq_cmd_param_0; + u8 _reserved18[0xA00 - 0x934]; + u32 geni_i3c_ibi_cfg_tablen; + u8 _reserved19[0xA80 - 0xA04]; + u32 geni_i3c_ibi_status; + u32 geni_i3c_ibi_rd_data; + u32 geni_i3c_ibi_search_pattern; + u32 geni_i3c_ibi_search_data; + u32 geni_i3c_sw_ibi_en; + u32 geni_i3c_sw_ibi_en_recover; + u8 _reserved20[0xC30 - 0xA98]; + u32 dma_tx_ptr_l; + u32 dma_tx_ptr_h; + u32 dma_tx_attr; + u32 dma_tx_length; + u32 dma_tx_irq_stat; + u32 dma_tx_irq_clr; + u32 dma_tx_irq_en; + u32 dma_tx_irq_en_set; + u32 dma_tx_irq_en_clr; + u32 dma_tx_length_in; + u32 dma_tx_fsm_rst; + u32 dma_tx_max_burst_size; + u8 _reserved21[0xD30 - 0xC60]; + u32 dma_rx_ptr_l; + u32 dma_rx_ptr_h; + u32 dma_rx_attr; + u32 dma_rx_length; + u32 dma_rx_irq_stat; + u32 dma_rx_irq_clr; + u32 dma_rx_irq_en; + u32 dma_rx_irq_en_set; + u32 dma_rx_irq_en_clr; + u32 dma_rx_length_in; + u32 dma_rx_fsm_rst; + u32 dma_rx_max_burst_size; + u32 dma_rx_flush; + u8 _reserved22[0xE14 - 0xD64]; + u32 se_irq_high_priority; + u32 se_gsi_event_en; + u32 se_irq_en; + u32 dma_if_en_ro; + u32 se_hw_param_0; + u32 se_hw_param_1; + u32 se_hw_param_2; + u32 dma_general_cfg; + u8 _reserved23[0x40 - 0x34]; + u32 dma_debug_reg0; + u32 dma_test_bus_ctrl; + u32 se_top_test_bus_ctrl; + u8 _reserved24[0x1000 - 0x0E4C]; + u32 se_geni_fw_revision; + u32 se_s_fw_revision; + u8 _reserved25[0x10-0x08]; + u32 se_geni_cfg_ramn; + u8 _reserved26[0x2000 - 0x1014]; + u32 se_geni_clk_ctrl; + u32 se_dma_if_en; + u32 se_fifo_if_disable; + u32 se_geni_fw_multilock_protns; + u32 se_geni_fw_multilock_msa; + u32 se_geni_fw_multilock_sp; +}; +check_member(qup_regs, geni_clk_sel, 0x7C); +check_member(qup_regs, geni_cfg_reg108, 0x2B0); +check_member(qup_regs, geni_dma_mode_en, 0x258); +check_member(qup_regs, geni_i3c_ibi_rd_data, 0xA84); +check_member(qup_regs, dma_test_bus_ctrl, 0xE44); +check_member(qup_regs, se_geni_cfg_ramn, 0x1010); +check_member(qup_regs, se_geni_fw_multilock_sp, 0x2014); + +static struct console_input_driver consin = { + .havekey = serial_havechar, + .getchar = serial_getchar, + .input_type = CONSOLE_INPUT_TYPE_UART, +}; + +static struct console_output_driver consout = { + .putchar = serial_putchar, +}; + +static struct qup_regs *uart_base_address(void) +{ + return (void *)(uintptr_t)lib_sysinfo.serial->baseaddr; +} + +static void uart_qupv3_tx_flush(void) +{ + struct qup_regs *regs = uart_base_address(); + + while (read32(®s->geni_status) & GENI_STATUS_M_GENI_CMD_ACTIVE_MASK) + ; +} + +static unsigned char uart_qupv3_rx_byte(void) +{ + struct qup_regs *regs = uart_base_address(); + + if (read32(®s->geni_rx_fifo_status) & RX_FIFO_WC_MSK) + return read32(®s->geni_rx_fifon) & 0xFF; + + return 0; +} + +static void uart_qupv3_tx_byte(unsigned char data) +{ + struct qup_regs *regs = uart_base_address(); + + uart_qupv3_tx_flush(); + + write32(®s->rx_trans_len.uart_tx_trans_len, 1); + /* Start TX */ + write32(®s->geni_m_cmd0, START_UART_TX); + write32(®s->geni_tx_fifon, data); +} + +void serial_putchar(unsigned int data) +{ + if (data == 0xa) + uart_qupv3_tx_byte(0xd); + uart_qupv3_tx_byte(data); +} + +int serial_havechar(void) +{ + struct qup_regs *regs = uart_base_address(); + + if (read32(®s->geni_rx_fifo_status) & RX_FIFO_WC_MSK) + return 1; + + return 0; +} + +int serial_getchar(void) +{ + return uart_qupv3_rx_byte(); +} + +void serial_console_init(void) +{ + if (!lib_sysinfo.serial) + return; + + console_add_output_driver(&consout); + console_add_input_driver(&consin); +}
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35960 )
Change subject: libpayload: Add uart/serial driver support for trogdor ......................................................................
Patch Set 37:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1215 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1214 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1213
Please note: This test is under development and might not be accurate at all!
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9elements QA (Code Review) -
build bot (Jenkins) (Code Review)
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Julius Werner (Code Review)
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mturney mturney (Code Review)
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Paul Menzel (Code Review)
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Ravi kumar (Code Review)
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Roja Rani Yarubandi (Code Review)