New patch to review for coreboot: 051fe3d amd/agesa/family12/northbridge.c: Indent (tab) fix
Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8015
-gerrit
commit 051fe3de721ebd8857dbbd014de8479866edd883 Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Thu Jan 1 03:49:47 2015 +1100
amd/agesa/family12/northbridge.c: Indent (tab) fix
Trivial, Use tab over space for indent.
Change-Id: Iba0e006197a020157b11746dd4999d87a8ca8d97 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/northbridge/amd/agesa/family12/northbridge.c | 189 +++++++++++------------ 1 file changed, 92 insertions(+), 97 deletions(-)
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c index fe9cd72..6301852 100644 --- a/src/northbridge/amd/agesa/family12/northbridge.c +++ b/src/northbridge/amd/agesa/family12/northbridge.c @@ -58,71 +58,66 @@ static device_t get_node_pci(u32 nodeid, u32 fn)
static void get_fx_devs(void) { - int i; - for(i = 0; i < FX_DEVS; i++) { - __f0_dev[i] = get_node_pci(i, 0); - __f1_dev[i] = get_node_pci(i, 1); - __f2_dev[i] = get_node_pci(i, 2); - __f4_dev[i] = get_node_pci(i, 4); - if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) - fx_devs = i+1; - } - if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) { - die("Cannot find 0:0x18.[0|1]\n"); - } -} + int i; + for(i = 0; i < FX_DEVS; i++) { + __f0_dev[i] = get_node_pci(i, 0); + __f1_dev[i] = get_node_pci(i, 1); + __f2_dev[i] = get_node_pci(i, 2); + __f4_dev[i] = get_node_pci(i, 4); + if (__f0_dev[i] != NULL && __f1_dev[i] != NULL) + fx_devs = i+1; + }
+ if (__f1_dev[0] == NULL || __f0_dev[0] == NULL || fx_devs == 0) + die("Cannot find 0:0x18.[0|1]\n"); +}
static u32 f1_read_config32(unsigned reg) { - if (fx_devs == 0) - get_fx_devs(); - return pci_read_config32(__f1_dev[0], reg); -} + if (fx_devs == 0) + get_fx_devs();
+ return pci_read_config32(__f1_dev[0], reg); +}
static void f1_write_config32(unsigned reg, u32 value) { - int i; - if (fx_devs == 0) - get_fx_devs(); - for(i = 0; i < fx_devs; i++) { - device_t dev; - dev = __f1_dev[i]; - if (dev && dev->enabled) { - pci_write_config32(dev, reg, value); - } - } + int i; + if (fx_devs == 0) + get_fx_devs(); + for(i = 0; i < fx_devs; i++) { + device_t dev = __f1_dev[i]; + if (dev && dev->enabled) { + pci_write_config32(dev, reg, value); + } + } }
- static u32 amdfam12_nodeid(device_t dev) { - printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s\n",__func__); - return (dev->path.pci.devfn >> 3) - CONFIG_CDB; + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s\n",__func__); + return (dev->path.pci.devfn >> 3) - CONFIG_CDB; }
- #include "amdfam12_conf.c"
- static void northbridge_init(device_t dev) { - printk(BIOS_DEBUG, "Northbridge init\n"); + printk(BIOS_DEBUG, "Northbridge init\n"); }
static void set_vga_enable_reg(u32 nodeid, u32 linkn) { - u32 val; + u32 val;
- printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); - val = 1 | (nodeid<<4) | (linkn<<12); - /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, - 0x3c0:0x3df */ - f1_write_config32(0xf4, val); + printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); + val = 1 | (nodeid<<4) | (linkn<<12); + /* it will routing (1)mmio 0xa0000:0xbffff (2) io 0x3b0:0x3bb, + 0x3c0:0x3df */ + f1_write_config32(0xf4, val);
- printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); }
@@ -768,35 +763,35 @@ static void domain_enable_resources(device_t dev)
static void cpu_bus_read_resources(device_t dev) { - printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); + printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__);
#if CONFIG_MMCONF_SUPPORT - struct resource *resource = new_resource(dev, 0xc0010058); - resource->base = CONFIG_MMCONF_BASE_ADDRESS; - resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; - resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | - IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + struct resource *resource = new_resource(dev, 0xc0010058); + resource->base = CONFIG_MMCONF_BASE_ADDRESS; + resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; + resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; #endif - printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); }
static void cpu_bus_set_resources(device_t dev) { - struct resource *resource = find_resource(dev, 0xc0010058); + struct resource *resource = find_resource(dev, 0xc0010058);
- printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); - if (resource) { - report_resource_stored(dev, resource, " <mmconfig>"); - } - pci_dev_set_resources(dev); - printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); + printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); + if (resource) { + report_resource_stored(dev, resource, " <mmconfig>"); + } + pci_dev_set_resources(dev); + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); }
static void cpu_bus_init(device_t dev) { - printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); - initialize_cpus(dev->link_list); - printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); + printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); + initialize_cpus(dev->link_list); + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); }
@@ -911,27 +906,27 @@ static unsigned long agesa_write_acpi_tables(unsigned long current,
static struct device_operations northbridge_operations = { - .read_resources = read_resources, - .set_resources = set_resources, - .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, - .write_acpi_tables = agesa_write_acpi_tables, - .enable_resources = pci_dev_enable_resources, - .init = northbridge_init, - .enable = 0, - .ops_pci = 0, + .read_resources = read_resources, + .set_resources = set_resources, + .acpi_fill_ssdt_generator = northbridge_fill_ssdt_generator, + .write_acpi_tables = agesa_write_acpi_tables, + .enable_resources = pci_dev_enable_resources, + .init = northbridge_init, + .enable = 0, + .ops_pci = 0, };
static const struct pci_driver northbridge_driver __pci_driver = { - .ops = &northbridge_operations, - .vendor = PCI_VENDOR_ID_AMD, - .device = 0x1705, + .ops = &northbridge_operations, + .vendor = PCI_VENDOR_ID_AMD, + .device = 0x1705, };
struct chip_operations northbridge_amd_agesa_family12_ops = { - CHIP_NAME("AMD Family 12h Northbridge") - .enable_dev = 0, + CHIP_NAME("AMD Family 12h Northbridge") + .enable_dev = 0, };
@@ -939,48 +934,48 @@ struct chip_operations northbridge_amd_agesa_family12_ops = {
static struct device_operations pci_domain_ops = { - .read_resources = domain_read_resources, - .set_resources = domain_set_resources, - .enable_resources = domain_enable_resources, - .init = NULL, - .scan_bus = pci_domain_scan_bus, +.read_resources = domain_read_resources, +.set_resources = domain_set_resources, +.enable_resources = domain_enable_resources, +.init = NULL, +.scan_bus = pci_domain_scan_bus, };
static struct device_operations cpu_bus_ops = { - .read_resources = cpu_bus_read_resources, - .set_resources = cpu_bus_set_resources, - .enable_resources = NULL, - .init = cpu_bus_init, - .scan_bus = 0, +.read_resources = cpu_bus_read_resources, +.set_resources = cpu_bus_set_resources, +.enable_resources = NULL, +.init = cpu_bus_init, +.scan_bus = 0, };
static void root_complex_enable_dev(struct device *dev) { - printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); - static int done = 0; + printk(BIOS_DEBUG, "\nFam12h - northbridge.c - %s - Start.\n",__func__); + static int done = 0;
/* Do not delay UMA setup, as a device on the PCI bus may evaluate the global uma_memory variables already in its enable function. */ - if (!done) { - setup_bsp_ramtop(); - setup_uma_memory(); - done = 1; - } + if (!done) { + setup_bsp_ramtop(); + setup_uma_memory(); + done = 1; + }
- /* Set the operations if it is a special bus type */ - if (dev->path.type == DEVICE_PATH_DOMAIN) { - dev->ops = &pci_domain_ops; - } - else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { - dev->ops = &cpu_bus_ops; - } - printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); + /* Set the operations if it is a special bus type */ + if (dev->path.type == DEVICE_PATH_DOMAIN) { + dev->ops = &pci_domain_ops; + } + else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + dev->ops = &cpu_bus_ops; + } + printk(BIOS_DEBUG, "Fam12h - northbridge.c - %s - End.\n",__func__); }
struct chip_operations northbridge_amd_agesa_family12_root_complex_ops = { - CHIP_NAME("AMD Family 12h Root Complex") - .enable_dev = root_complex_enable_dev, + CHIP_NAME("AMD Family 12h Root Complex") + .enable_dev = root_complex_enable_dev, };
-
Edward O'Callaghan