Change in coreboot[master]: soc/mediatek/mt8183: TX RX window donot fast K for High frequency
huayang duan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window donot fast K for High frequency ......................................................................
soc/mediatek/mt8183: TX RX window donot fast K for High frequency
TX RX window can do fast calibraton at lower frquency, like 1600Mbps, 2400Mbps, but High frequency can't do fast calibraton.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/1
diff --git a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c old mode 100644 new mode 100755 index 16f2878..414133a --- a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c @@ -1788,7 +1788,7 @@
u8 fsp = get_freq_fsq(freq_group); u8 vref_range = !fsp; - bool bypass_tx = !fsp; + bool bypass_tx_rx = !fsp;
dramc_get_vref_prop(rank, type, fsp, &vref_scan_enable, &vref_begin, &vref_end); @@ -1826,9 +1826,9 @@ vref_step = 2; }
- if (fast_calib && bypass_tx && + if (fast_calib && bypass_tx_rx && (type == TX_WIN_DQ_ONLY || type == TX_WIN_DQ_DQM)) { - dramc_set_tx_best_dly(chn, rank, true, vref_dly.perbit_dly, + dramc_set_tx_best_dly(chn, rank, bypass_tx_rx, vref_dly.perbit_dly, type, freq_group, dq_precal_result, dly_cell_unit, params, fast_calib);
@@ -1872,7 +1872,7 @@ RX_DQ, FIRST_DQ_DELAY); }
- if (fast_calib && + if (fast_calib && bypass_tx_rx && (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG)) { dramc_dbg("bypass RX params\n"); for (size_t bit = 0; bit < DQ_DATA_WIDTH; bit++) {
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36921
to look at the new patch set (#2).
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
soc/mediatek/mt8183: TX RX window should not do fast K for High frequency
TX RX window can do fast calibraton at lower frquency, like 1600Mbps, 2400Mbps, but High frequency can't do fast calibraton.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 13 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36921/2/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/2/src/soc/mediatek/mt8183/dra... PS2, Line 1650: dramc_dbg("u1DelayCellOfst[%d]=%d cells (%d PI)\n", index, dq_delay_cell[index], tune_diff); line over 96 characters
https://review.coreboot.org/c/coreboot/+/36921/2/src/soc/mediatek/mt8183/dra... PS2, Line 1794: dramc_show("bypass TX RX window: %s\n", bypass_tx_rx ? "Yes": "No"); spaces required around that ':' (ctx:VxW)
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36921
to look at the new patch set (#3).
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
soc/mediatek/mt8183: TX RX window should not do fast K for High frequency
TX RX window can do fast calibraton at lower frquency, like 1600Mbps, 2400Mbps, but High frequency can't do fast calibraton.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 14 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1650: trailing whitespace
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1593: 796 how this was calculated? I know it's freq/2, but why -4 ? can you add some comment?
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1648: clock_rate this looks like doubled. Are you sure we don't need to /2 or something?
Huayang Duan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1593: 796
how this was calculated? I know it's freq/2, but why -4 ? can you add some comment?
the real CK DRAMC output is 796,1196,1596,1972, NOT 800,1200,1400,1866 Dram Type= 6, Freq= 796, FreqGroup= 800, CH_0, rank 0 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0 Dram Type= 6, Freq= 1792, FreqGroup= 1866, CH_0, rank 1
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1648: clock_rate
this looks like doubled. […]
this place need using clock rate do computer, so NOT need /2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency ......................................................................
Patch Set 3:
(7 comments)
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@7 PS3, Line 7: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency Please make it a statement of the change (imperative mood). Maybe:
soc/mediatek/mt8183: Skip fast K for high frequency for TX RX window
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@9 PS3, Line 9: frquency frequencies
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@10 PS3, Line 10: High high
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@10 PS3, Line 10: High frequency Like what values?
Is that limitation documented in a data sheet?
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@11 PS3, Line 11: Please quickly explain the implementation. Why do you lower some values for example.
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@14 PS3, Line 14: TEST=Boots correctly on Kukui Before it just hung or what?
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@17 PS3, Line 17: Your Signed-off-by line is missing.
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36921
to look at the new patch set (#4).
Change subject: soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window ......................................................................
soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window
TX RX window can do fast calibraton at lower frequency, like 1600Mbps and 2400Mbps. But high frequency of TX RX window can't do fast calibraton, like 3200Mbps and 3600Mbps.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui Signed-off-by: Huayang Duan huayang.duan@mediatek.com
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 14 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/4
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window ......................................................................
Patch Set 3:
(1 comment)
please split into two patches:
1. soc/mediatek/mt8183: Correct clock rate settings
/* include the -4 and clock_rate * 64 */
2. soc/mediatek/mt8183: fully calibrate TX RX window on high frequency
/* include only the parts related to not doing calibration on those data */
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1591: freq_group Please add a comment here:
/* * The clock rate should be (memory frequency / 2 - 4), * and the 4MHz is introduced to reduce interference from * RF peripherals like modem, WiFi, and Bluetooth. */
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36921
to look at the new patch set (#5).
Change subject: soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window ......................................................................
soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window
TX RX window can do fast calibraton at lower frequency, like 1600Mbps and 2400Mbps. But high frequency of TX RX window can't do fast calibraton, like 3200Mbps and 3600Mbps.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui Signed-off-by: Huayang Duan huayang.duan@mediatek.com
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/5
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for High frequency of TX RX window ......................................................................
Patch Set 5: Code-Review+1
(2 comments)
seems fine, just few nits in commit message
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG@7 PS5, Line 7: High high
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG@9 PS5, Line 9: TX RX window can do fast calibraton at lower frequency, : like 1600Mbps and 2400Mbps. : But high frequency of TX RX window can't do fast calibraton, : like 3200Mbps and 3600Mbps. For low frequency (e.g., 1600 or 2400 Mbps) we can do fast calibration for TX and RX window. However, for high frequency (e.g., 3200 or 3600 Mbps) a full calibration is needed.
Hello Julius Werner, Hung-Te Lin, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36921
to look at the new patch set (#6).
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window
For low frequency (e.g., 1600 or 2400 Mbps) we can do fast calibration for TX and RX window. However, for high frequency (e.g., 3200 or 3600 Mbps) a full calibration is needed.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui Signed-off-by: Huayang Duan huayang.duan@mediatek.com
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/36921/6
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
Patch Set 6: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
Patch Set 6: Code-Review+1
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
Patch Set 6:
(11 comments)
the fixes addressing comments were moved to next patchset.
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@7 PS3, Line 7: soc/mediatek/mt8183: TX RX window should not do fast K for High frequency
Please make it a statement of the change (imperative mood). Maybe: […]
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@9 PS3, Line 9: frquency
frequencies
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@10 PS3, Line 10: High
high
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@10 PS3, Line 10: High frequency
Like what values? […]
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@11 PS3, Line 11:
Please quickly explain the implementation. Why do you lower some values for example.
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@14 PS3, Line 14: TEST=Boots correctly on Kukui
Before it just hung or what?
Ack
https://review.coreboot.org/c/coreboot/+/36921/3//COMMIT_MSG@17 PS3, Line 17:
Your Signed-off-by line is missing.
Ack
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... File src/soc/mediatek/mt8183/dramc_pi_calibration_api.c:
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1591: freq_group
Please add a comment here: […]
Ack
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1593: 796
the real CK DRAMC output is 796,1196,1596,1972, NOT 800,1200,1400,1866 […]
Ack
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1648: clock_rate
this place need using clock rate do computer, so NOT need /2
Ack
https://review.coreboot.org/c/coreboot/+/36921/3/src/soc/mediatek/mt8183/dra... PS3, Line 1650:
trailing whitespace
Ack
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG@7 PS5, Line 7: High
high
Done
https://review.coreboot.org/c/coreboot/+/36921/5//COMMIT_MSG@9 PS5, Line 9: TX RX window can do fast calibraton at lower frequency, : like 1600Mbps and 2400Mbps. : But high frequency of TX RX window can't do fast calibraton, : like 3200Mbps and 3600Mbps.
For low frequency (e.g., 1600 or 2400 Mbps) we can do fast […]
Done
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36921 )
Change subject: soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window ......................................................................
soc/mediatek/mt8183: skip fast calibration for high frequency of TX RX window
For low frequency (e.g., 1600 or 2400 Mbps) we can do fast calibration for TX and RX window. However, for high frequency (e.g., 3200 or 3600 Mbps) a full calibration is needed.
BUG=b:80501386,b:142358843 BRANCH=kukui TEST=Boots correctly on Kukui Signed-off-by: Huayang Duan huayang.duan@mediatek.com
Change-Id: I00d563ece4cf91ef5e8e12b6cf7f777849375a24 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36921 Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c 1 file changed, 5 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, but someone else must approve
diff --git a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c index cd9f328..8c17d84 100644 --- a/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_calibration_api.c @@ -1788,8 +1788,9 @@
u8 fsp = get_freq_fsq(freq_group); u8 vref_range = !fsp; - bool bypass_tx = !fsp; + bool bypass_tx_rx = !fsp;
+ dramc_dbg("bypass TX RX window: %s\n", bypass_tx_rx ? "Yes" : "No"); dramc_get_vref_prop(rank, type, fsp, &vref_scan_enable, &vref_begin, &vref_end); dramc_get_dly_range(chn, rank, type, freq_group, dq_precal_result, @@ -1826,9 +1827,9 @@ vref_step = 2; }
- if (fast_calib && bypass_tx && + if (fast_calib && bypass_tx_rx && (type == TX_WIN_DQ_ONLY || type == TX_WIN_DQ_DQM)) { - dramc_set_tx_best_dly(chn, rank, true, vref_dly.perbit_dly, + dramc_set_tx_best_dly(chn, rank, bypass_tx_rx, vref_dly.perbit_dly, type, freq_group, dq_precal_result, dly_cell_unit, params, fast_calib);
@@ -1872,7 +1873,7 @@ RX_DQ, FIRST_DQ_DELAY); }
- if (fast_calib && + if (fast_calib && bypass_tx_rx && (type == RX_WIN_RD_DQC || type == RX_WIN_TEST_ENG)) { dramc_dbg("bypass RX params\n"); for (size_t bit = 0; bit < DQ_DATA_WIDTH; bit++) {
-
build bot (Jenkins) (Code Review) -
Huayang Duan (Code Review)
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huayang duan (Code Review)
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Hung-Te Lin (Code Review)
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Patrick Georgi (Code Review)
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Paul Menzel (Code Review)
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Yu-Ping Wu (Code Review)