Change in coreboot[master]: soc/intel/skylake: Configure L1 substates for PCH root ports

[Benjamin Doron (Code Review)]

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39538 )

Change subject: soc/intel/skylake: Configure L1 substates for PCH root ports
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Patch Set 27:

(1 comment)

https://review.coreboot.org/c/coreboot/+/39538/14/src/soc/intel/skylake/chip... 
File src/soc/intel/skylake/chip.h:

https://review.coreboot.org/c/coreboot/+/39538/14/src/soc/intel/skylake/chip... 
PS14, Line 286: PcieRpAspm
> Not done.

Done