Martin Roth (martinroth@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12569
-gerrit
commit 44c8816e6ff099abc3e3ecd43714aa34c2ae0aff Author: Martin Roth martinroth@google.com Date: Sat Nov 28 16:30:40 2015 -0700
intel/mohonpeak: Change SEABIOS_MALLOC_UPPERMEMORY to config_seabios
Instead of the SEABIOS_MALLOC_UPPERMEMORY option, use a saved SeaBIOS .config file to do the same thing.
Change-Id: I29110a382b7770329ef938876426e571fbbbb339 Signed-off-by: Martin Roth martinroth@google.com --- src/mainboard/intel/mohonpeak/Kconfig | 8 ++++---- src/mainboard/intel/mohonpeak/config_seabios | 5 +++++ 2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index 8ea184b..8f6e077 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -71,10 +71,10 @@ config UART_FOR_CONSOLE help The Mohon Peak board uses COM2 (2f8) for the serial console.
-config SEABIOS_MALLOC_UPPERMEMORY - bool - default n - help + config PAYLOAD_CONFIGFILE + string + default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios" + help The Avoton/Rangeley chip does not allow devices to write into the 0xe000 segment. This means that USB/SATA devices will not work in SeaBIOS unless we put the SeaBIOS buffer area down in the 0x9000 segment. diff --git a/src/mainboard/intel/mohonpeak/config_seabios b/src/mainboard/intel/mohonpeak/config_seabios new file mode 100644 index 0000000..f688f2b --- /dev/null +++ b/src/mainboard/intel/mohonpeak/config_seabios @@ -0,0 +1,5 @@ +# The Avoton/Rangeley chip does not allow devices to write into the 0xe000 +# segment. This means that USB/SATA devices will not work in SeaBIOS unless +# we put the SeaBIOS buffer area down in the 0x9000 segment. + +# CONFIG_MALLOC_UPPERMEMORY is not set