Change in coreboot[master]: soc/intel/xeon_sp/bootblock.c: Report the FSP-T output

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46885 )

Change subject: soc/intel/xeon_sp/bootblock.c: Report the FSP-T output
......................................................................

soc/intel/xeon_sp/bootblock.c: Report the FSP-T output

Change-Id: I03841f8263203ee306f83b8f8e859ec03edc3bd3
Signed-off-by: Arthur Heymans 
---
M src/soc/intel/xeon_sp/bootblock.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/46885/1

diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c
index f6653e2..5adda44 100644
--- a/src/soc/intel/xeon_sp/bootblock.c
+++ b/src/soc/intel/xeon_sp/bootblock.c
@@ -10,6 +10,7 @@
 #include <intelblocks/lpc_lib.h>
 #include <soc/pci_devs.h>
 #include <soc/bootblock.h>
+#include <fsp/util.h>

const FSPT_UPD temp_ram_init_params = {
    .FspUpdHeader = {
@@ -54,5 +55,7 @@
 {
    if (CONFIG(BOOTBLOCK_CONSOLE))
    	printk(BIOS_DEBUG, "FSP TempRamInit successful...\n");
+	if (CONFIG(FSP_CAR))
+		report_fspt_output();
    bootblock_pch_init();
 }

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46885 )

Change subject: soc/intel/xeon_sp/bootblock.c: Report the FSP-T output
......................................................................

Patch Set 2: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46885 )

Change subject: soc/intel/xeon_sp/bootblock.c: Report the FSP-T output
......................................................................

soc/intel/xeon_sp/bootblock.c: Report the FSP-T output

Change-Id: I03841f8263203ee306f83b8f8e859ec03edc3bd3
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46885
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/xeon_sp/bootblock.c
1 file changed, 3 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c
index f6653e2..5adda44 100644
--- a/src/soc/intel/xeon_sp/bootblock.c
+++ b/src/soc/intel/xeon_sp/bootblock.c
@@ -10,6 +10,7 @@
 #include <intelblocks/lpc_lib.h>
 #include <soc/pci_devs.h>
 #include <soc/bootblock.h>
+#include <fsp/util.h>

const FSPT_UPD temp_ram_init_params = {
    .FspUpdHeader = {
@@ -54,5 +55,7 @@
 {
    if (CONFIG(BOOTBLOCK_CONSOLE))
    	printk(BIOS_DEBUG, "FSP TempRamInit successful...\n");
+	if (CONFIG(FSP_CAR))
+		report_fspt_output();
    bootblock_pch_init();
 }