Arthur Heymans has uploaded this change for review.

View Change

soc/intel/xeon_sp/bootblock.c: Report the FSP-T output

Change-Id: I03841f8263203ee306f83b8f8e859ec03edc3bd3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/soc/intel/xeon_sp/bootblock.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/46885/1
diff --git a/src/soc/intel/xeon_sp/bootblock.c b/src/soc/intel/xeon_sp/bootblock.c
index f6653e2..5adda44 100644
--- a/src/soc/intel/xeon_sp/bootblock.c
+++ b/src/soc/intel/xeon_sp/bootblock.c
@@ -10,6 +10,7 @@
#include <intelblocks/lpc_lib.h>
#include <soc/pci_devs.h>
#include <soc/bootblock.h>
+#include <fsp/util.h>

const FSPT_UPD temp_ram_init_params = {
.FspUpdHeader = {
@@ -54,5 +55,7 @@
{
if (CONFIG(BOOTBLOCK_CONSOLE))
printk(BIOS_DEBUG, "FSP TempRamInit successful...\n");
+ if (CONFIG(FSP_CAR))
+ report_fspt_output();
bootblock_pch_init();
}

To view, visit change 46885. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I03841f8263203ee306f83b8f8e859ec03edc3bd3
Gerrit-Change-Number: 46885
Gerrit-PatchSet: 1
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newchange