Change in coreboot[master]: soc/intel/denverton_ns: Add UART legacy mode with FSP traces

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Change subject: soc/intel/denverton_ns: Add UART legacy mode with FSP traces
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Patch Set 4:

Build Successful

https://qa.coreboot.org/job/coreboot-gerrit/68099/ : SUCCESS

https://qa.coreboot.org/job/coreboot-checkpatch/22555/ : SUCCESS