Change in coreboot[master]: nb/intel/sandybridge: Extend rcven coarse range with fast RAM
Hello Felix Singer, Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48419
to review the following change.
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
nb/intel/sandybridge: Extend rcven coarse range with fast RAM
If memory frequency is high, extend rcven coarse search range two additional QCLKs to prevent raminit errors on some mainboards.
Tested on Asus P8Z77-V LX2, memory can now run at DDR3-2133 speeds.
Change-Id: Ia65ee41f75974a7095b7dec54168fb889ecbe4a0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/48419/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index f495d9d..6949420 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1207,7 +1207,10 @@ u32 statistics[NUM_LANES][4]; int lane;
- for (u32 logic_delay = 0; logic_delay < 2; logic_delay++) { + /* Extend coarse search range for faster clock speeds */ + const u32 max_logic_delay = ctrl->tCK < TCK_933MHZ ? 4 : 2; + + for (u32 logic_delay = 0; logic_delay < max_logic_delay; logic_delay++) { for (rcven = 0; rcven < 64; rcven++) { FOR_ALL_LANES { ctrl->timings[channel][slotrank].lanes[lane].rcven =
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48419 )
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... PS1, Line 1207: 4 2 * max_logic_delay
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... PS1, Line 1229: 4 2 * max_logic_delay
Hello Felix Singer, build bot (Jenkins), Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48419
to look at the new patch set (#2).
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
nb/intel/sandybridge: Extend rcven coarse range with fast RAM
If memory frequency is high, extend rcven coarse search range two additional QCLKs to prevent raminit errors on some mainboards.
Tested on Asus P8Z77-V LX2, memory can now run at DDR3-2133 speeds.
Change-Id: Ia65ee41f75974a7095b7dec54168fb889ecbe4a0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c M src/northbridge/intel/sandybridge/raminit_native.c 2 files changed, 11 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/48419/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48419 )
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... PS1, Line 1207: 4
2 * max_logic_delay
Done (had to use a constant value though)
https://review.coreboot.org/c/coreboot/+/48419/1/src/northbridge/intel/sandy... PS1, Line 1229: 4
2 * max_logic_delay
Done
Hello Felix Singer, build bot (Jenkins), Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48419
to look at the new patch set (#3).
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
nb/intel/sandybridge: Extend rcven coarse range with fast RAM
If memory frequency is high, extend rcven coarse search range two additional QCLKs to prevent raminit errors on some mainboards.
Tested on Asus P8Z77-V LX2, memory can now run at DDR3-2133 speeds.
Change-Id: Ia65ee41f75974a7095b7dec54168fb889ecbe4a0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 7 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/48419/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48419 )
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48419/3/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/48419/3/src/northbridge/intel/sandy... PS3, Line 1234: 4 2 * max_logic_delay?
Hello Felix Singer, build bot (Jenkins), Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48419
to look at the new patch set (#4).
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
nb/intel/sandybridge: Extend rcven coarse range with fast RAM
If memory frequency is high, extend rcven coarse search range two additional QCLKs to prevent raminit errors on some mainboards.
Tested on Asus P8Z77-V LX2, memory can now run at DDR3-2133 speeds.
Change-Id: Ia65ee41f75974a7095b7dec54168fb889ecbe4a0 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 8 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/48419/4
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48419 )
Change subject: nb/intel/sandybridge: Extend rcven coarse range with fast RAM ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48419/3/src/northbridge/intel/sandy... File src/northbridge/intel/sandybridge/raminit_common.c:
https://review.coreboot.org/c/coreboot/+/48419/3/src/northbridge/intel/sandy... PS3, Line 1234: 4
2 * max_logic_delay?
Good point
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)