Angel Pons would like Felix Singer, Nico Huber, Arthur Heymans and Patrick Rudolph to review this change.
nb/intel/sandybridge: Extend rcven coarse range with fast RAM
If memory frequency is high, extend rcven coarse search range two
additional QCLKs to prevent raminit errors on some mainboards.
Tested on Asus P8Z77-V LX2, memory can now run at DDR3-2133 speeds.
Change-Id: Ia65ee41f75974a7095b7dec54168fb889ecbe4a0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/northbridge/intel/sandybridge/raminit_common.c
1 file changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/48419/1
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index f495d9d..6949420 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -1207,7 +1207,10 @@
u32 statistics[NUM_LANES][4];
int lane;
- for (u32 logic_delay = 0; logic_delay < 2; logic_delay++) {
+ /* Extend coarse search range for faster clock speeds */
+ const u32 max_logic_delay = ctrl->tCK < TCK_933MHZ ? 4 : 2;
+
+ for (u32 logic_delay = 0; logic_delay < max_logic_delay; logic_delay++) {
for (rcven = 0; rcven < 64; rcven++) {
FOR_ALL_LANES {
ctrl->timings[channel][slotrank].lanes[lane].rcven =
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