Attention is currently required from: David Wu, Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Paul Menzel, Tarun.
Tyler Wang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80000?usp=email )
Change subject: mb/google/rex/var/karis: Set SOC_TCHSCR_RST output low in bootblock
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/80000/comment/126fe483_daf1e586 :
PS5, Line 8:
Please start by mentioning that the touchscreen does not work.
No, the touchscreen can work. But the default setting of SOC_TCHSCR_RST is native function 1. Set SOC_TCHSCR_RST to output low to prevent it pull high unexpectedly.
https://review.coreboot.org/c/coreboot/+/80000/comment/cb1edd24_5a48a55b :
PS5, Line 10: Set SOC_TCHSCR_RST to output low in bootblock.
Why in bootblock? So, the delay can be reduced?
It's related to CB:79571. The reason of set EN_TCHSCR_PWR to output high in bootblock is because the delay time between EN_TCHSCR_PWR high --> SOC_TCHSCR_RST high is too short to meet spec. To extend the delay time, set EN_TCHSCR_PWR to output high from romstage_gpio_table to early_gpio_table.
Set SOC_TCHSCR_RST to output low in early_gpio_table is because the default setting of SOC_TCHSCR_RST is native function 1. To prevent it pull high unexpectedly, set it to output low in early_gpio_table.
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