Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
(8 comments)
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG@9 PS11, Line 9: WIP Still a WIP?
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c File src/arch/arm64/armv8/cache.c:
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c@a42 PS11, Line 42: I don't see any functional changes to this method (other than removing the static). Is there a reason it was changed?
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig@8 PS11, Line 8: CPU_ARMLTD_CORTEX_A53 Remove the the empty branch.
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 6: * SPDX-License-Identifier: GPL-2.0-or-later I think coreboot is typically a GPL-2.0-only project?
The checkpatch script typically prefers the SPDX line as its own comment: https://github.com/torvalds/linux/blob/db54615e21419c3cb4d699a0b0aa16cc44d0e...
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 20: EL1 I thought you were able to run this in EL3?
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 21: 0x60000000 #define this constant and all the other constants.
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 24: 0x4c000000 #define register addresses
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 31: 4 #define regiser offsets