Change in ...coreboot[master]: mainboard/emulation/qemu-aarch64: Add new board for ARMv8
Asami Doi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33387
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt -cpu cortex-a53 \ -bios build/coreboot.rom -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi doiasami1219@gmail.com --- M src/cpu/armltd/Kconfig M src/cpu/armltd/Makefile.inc A src/cpu/armltd/cortex-a53/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/timer.c 15 files changed, 408 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/1
diff --git a/src/cpu/armltd/Kconfig b/src/cpu/armltd/Kconfig index af0c5c5..fc01735 100644 --- a/src/cpu/armltd/Kconfig +++ b/src/cpu/armltd/Kconfig @@ -1 +1,2 @@ source src/cpu/armltd/cortex-a9/Kconfig +source src/cpu/armltd/cortex-a53/Kconfig diff --git a/src/cpu/armltd/Makefile.inc b/src/cpu/armltd/Makefile.inc index 014742f..cd6acf1 100644 --- a/src/cpu/armltd/Makefile.inc +++ b/src/cpu/armltd/Makefile.inc @@ -1 +1,2 @@ subdirs-$(CONFIG_CPU_ARMLTD_CORTEX_A9) += cortex-a9 +subdirs-$(CONFIG_CPU_ARMLTD_CORTEX_A53) += cortex-a53 diff --git a/src/cpu/armltd/cortex-a53/Kconfig b/src/cpu/armltd/cortex-a53/Kconfig new file mode 100644 index 0000000..1cbfc33 --- /dev/null +++ b/src/cpu/armltd/cortex-a53/Kconfig @@ -0,0 +1,10 @@ +config CPU_ARMLTD_CORTEX_A53 + bool + select ARCH_BOOTBLOCK_ARMV8_64 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + default n + +if CPU_ARMLTD_CORTEX_A53 + +endif diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig b/src/mainboard/emulation/qemu-aarch64/Kconfig new file mode 100644 index 0000000..9fda646 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig @@ -0,0 +1,56 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +## +## This software is licensed under the terms of the GNU General Public +## License version 2, as published by the Free Software Foundation, and +## may be copied, distributed, and modified under those terms. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. + +# Emulation for QEMU 2.8 ARM Virtual Machine (alias of virt-2.8) +# https://wiki.qemu.org/Documentation/Platforms/ARM + +# To execute, do: +# export QEMU_AUDIO_DRV = none +# qemu-system-aarch64 -M virt -m 1024M -cpu cortex-a53 -nographic -bios build/coreboot.rom + +if BOARD_EMULATION_QEMU_AARCH64 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select CPU_ARMLTD_CORTEX_A53 + select DRIVERS_UART_PL011 + select CONSOLE_SERIAL + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_FORCE_NATIVE_VGA_INIT + select HAVE_LINEAR_FRAMEBUFFER + select ARCH_BOOTBLOCK_ARMV8_64 + select ARCH_VERSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + select BOARD_ROMSIZE_KB_4096 + select BOOT_DEVICE_NOT_SPI_FLASH + select MISSING_BOARD_RESET + +config MAINBOARD_DIR + string + default emulation/qemu-aarch64 + +config MAINBOARD_PART_NUMBER + string + default "QEMU AArch64" + +config MAX_CPUS + int + default 2 + +config MAINBOARD_VENDOR + string + default "ARM Ltd." + +endif # BOARD_EMULATION_QEMU_AARCH64 diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig.name b/src/mainboard/emulation/qemu-aarch64/Kconfig.name new file mode 100644 index 0000000..9789823 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_EMULATION_QEMU_AARCH64 + bool "QEMU AArch64 (virt)" diff --git a/src/mainboard/emulation/qemu-aarch64/Makefile.inc b/src/mainboard/emulation/qemu-aarch64/Makefile.inc new file mode 100644 index 0000000..e120bec --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Makefile.inc @@ -0,0 +1,32 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com +## +## This software is licensed under the terms of the GNU General Public +## License version 2, as published by the Free Software Foundation, and +## may be copied, distributed, and modified under those terms. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. + +romstage-y += cbmem.c +ramstage-y += cbmem.c + +bootblock-y += media.c +romstage-y += media.c +ramstage-y += media.c + +bootblock-y += timer.c +romstage-y += timer.c +ramstage-y += timer.c + +bootblock-y += mmio.c +romstage-y += mmio.c +ramstage-y += mmio.c + +bootblock-y += memlayout.ld +romstage-y += memlayout.ld +ramstage-y += memlayout.ld diff --git a/src/mainboard/emulation/qemu-aarch64/board_info.txt b/src/mainboard/emulation/qemu-aarch64/board_info.txt new file mode 100644 index 0000000..e3ecc19 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/board_info.txt @@ -0,0 +1,3 @@ +Board name: QEMU AArch64 (virt) +Category: emulation +Board URL: https://wiki.qemu.org/Documentation/Platforms/ARM diff --git a/src/mainboard/emulation/qemu-aarch64/cbmem.c b/src/mainboard/emulation/qemu-aarch64/cbmem.c new file mode 100644 index 0000000..635fe4b --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/cbmem.c @@ -0,0 +1,65 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stddef.h> +#include <cbmem.h> +#include <symbols.h> +#include <device/mmio.h> +#include "mainboard.h" + +#define PATTERN1 0x55 +#define PATTERN2 0xaa + +/* Returns 1 if mebibyte mb is present and 0 otherwise. */ +static int probe_mb(int mb) +{ + char *ptr = (char *)0x60000000 + (mb << 20) + 0xfffff; + char old; + if (ptr < (char *)&_eprogram) { + /* Don't probe below _end to avoid accidentally clobering + oneself. */ + return 1; + } + + old = read8(ptr); + write8(ptr, PATTERN1); + if (read8(ptr) != PATTERN1) + return 0; + write8(ptr, PATTERN2); + if (read8(ptr) != PATTERN2) + return 0; + write8(ptr, old); + return 1; +} + +int probe_ramsize(void) +{ + int i; + int discovered = 0; + static int saved_result; + if (saved_result) + return saved_result; + /* Compact binary search. */ + /* 1 GiB is the largest supported RAM by this machine. */ + for (i = 9; i >= 0; i--) + if (probe_mb(discovered | (1 << i))) + discovered |= (1 << i); + discovered++; + saved_result = discovered; + return discovered; +} + +void *cbmem_top(void) +{ + return _dram + (probe_ramsize() << 20); +} diff --git a/src/mainboard/emulation/qemu-aarch64/devicetree.cb b/src/mainboard/emulation/qemu-aarch64/devicetree.cb new file mode 100644 index 0000000..258d7ba --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/devicetree.cb @@ -0,0 +1,19 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +## +## This software is licensed under the terms of the GNU General Public +## License version 2, as published by the Free Software Foundation, and +## may be copied, distributed, and modified under those terms. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. + +chip cpu/armltd/cortex-a53 + chip drivers/generic/generic # I2C0 controller + device i2c 6 on end # Fake component for testing + end +end diff --git a/src/mainboard/emulation/qemu-aarch64/mainboard.c b/src/mainboard/emulation/qemu-aarch64/mainboard.c new file mode 100644 index 0000000..f0b90f1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mainboard.c @@ -0,0 +1,69 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 or, at your option, any later + * version of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <device/device.h> +#include <cbmem.h> +#include <halt.h> +#include "mainboard.h" +#include <edid.h> +#include <device/mmio.h> + +static void init_gfx(void) +{ + uint32_t *pl111; + struct edid edid; + /* width is at most 4096 */ + /* height is at most 1024 */ + int width = 800, height = 600; + uint32_t framebuffer = 0x4c000000; + pl111 = (uint32_t *)0x10020000; + write32(pl111, (width / 4) - 4); + write32(pl111 + 1, height - 1); + /* registers 2, 3 and 5 are ignored by qemu. Set them correctly if + we ever go for real hw. */ + /* framebuffer address offset. Has to be in vram. */ + write32(pl111 + 4, framebuffer); + write32(pl111 + 7, 0); + write32(pl111 + 10, 0xff); + write32(pl111 + 6, (5 << 1) | 0x801); + + edid.framebuffer_bits_per_pixel = 32; + edid.bytes_per_line = width * 4; + edid.x_resolution = width; + edid.y_resolution = height; + + set_vbe_mode_info_valid(&edid, framebuffer); +} + +static void mainboard_enable(struct device *dev) +{ + int discovered; + if (!dev) { + printk(BIOS_EMERG, "No dev0; die\n"); + halt(); + } + + discovered = probe_ramsize(); + printk(BIOS_DEBUG, "%d MiB of RAM discovered\n", discovered); + ram_resource(dev, 0, 0x60000000 >> 10, discovered << 10); + cbmem_recovery(0); + init_gfx(); +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/emulation/qemu-aarch64/mainboard.h b/src/mainboard/emulation/qemu-aarch64/mainboard.h new file mode 100644 index 0000000..b6927ea --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mainboard.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 or, at your option, any later + * version of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef QEMU_AARCH64_MAINBOARD_H +#define QEMU_AARCH64_MAINBOARD_H + +/* Returns RAM size in mebibytes. */ +int probe_ramsize(void); + +#endif diff --git a/src/mainboard/emulation/qemu-aarch64/media.c b/src/mainboard/emulation/qemu-aarch64/media.c new file mode 100644 index 0000000..c9c3a34 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/media.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boot_device.h> + +/* Maps directly to NOR flash up to ROM size. */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT((void *)0x0, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/mainboard/emulation/qemu-aarch64/memlayout.ld b/src/mainboard/emulation/qemu-aarch64/memlayout.ld new file mode 100644 index 0000000..03db138 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/memlayout.ld @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <memlayout.h> + +#include <arch/header.ld> + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0x0000_0000: Flash memory + * 0x0800_0000: I/O map address + * 0x6000_0000: RAM + */ + +#define VIRT_FLASH_START 0x00000000 +#define VIRT_IO_START 0x08000000 +#define VIRT_DRAM_START 0x60000000 + +/* + * This map is designed to work with new qemu virt memory layout and + * with -bios option which neatly puts coreboot into flash and so payloads + * can find CBFS and we don't risk overwriting CBFS. + * + * Prior to Jul 2014 qemu aliased 0 to begining of RAM instead of flash + * and -bios was unusable as $pc pointed to 0 which was zero-filled as a + * workaround we suggested using -kernel but this still had all the issues + * of having fake-ROM in RAM. In fact it was even worse as fake ROM ends + * up exactly at addresses needed to load Linux. + */ +SECTIONS +{ + BOOTBLOCK(VIRT_FLASH_START, 64K) + + DRAM_START(VIRT_DRAM_START) + STACK(VIRT_DRAM_START, 64K) + ROMSTAGE(VIRT_DRAM_START + 0x10000, 128K) + RAMSTAGE(VIRT_DRAM_START + 0x30000, 16M) + + /* TODO: Implement MMU support and move TTB to a better location. */ + TTB(0x61030000, 16K) +} diff --git a/src/mainboard/emulation/qemu-aarch64/mmio.c b/src/mainboard/emulation/qemu-aarch64/mmio.c new file mode 100644 index 0000000..1b9a669 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mmio.c @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/uart.h> + +#define VIRT_UART_IO_ADDRESS (0x09000000) + +uintptr_t uart_platform_base(int idx) +{ + return VIRT_UART_IO_ADDRESS; +} diff --git a/src/mainboard/emulation/qemu-aarch64/timer.c b/src/mainboard/emulation/qemu-aarch64/timer.c new file mode 100644 index 0000000..599a872 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/timer.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +void udelay(unsigned int n); +void udelay(unsigned int n) +{ + /* TODO provide delay here. */ +} + +int init_timer(void); +int init_timer(void) +{ + return 0; +}
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/33387/1/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/#/c/33387/1/src/mainboard/emulation/qemu-aarch64... PS1, Line 38: * Prior to Jul 2014 qemu aliased 0 to begining of RAM instead of flash 'begining' may be misspelled - perhaps 'beginning'?
Asami Doi has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt -cpu cortex-a53 \ -bios build/coreboot.rom -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi doiasami1219@gmail.com --- M src/cpu/armltd/Kconfig M src/cpu/armltd/Makefile.inc A src/cpu/armltd/cortex-a53/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/timer.c 15 files changed, 408 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/33387/2/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/#/c/33387/2/src/mainboard/emulation/qemu-aarch64... PS2, Line 38: * Prior to Jul 2014 qemu aliased 0 to begining of RAM instead of flash 'begining' may be misspelled - perhaps 'beginning'?
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#3).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt -cpu cortex-a53 \ -bios build/coreboot.rom -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi doiasami1219@gmail.com --- M src/cpu/armltd/Kconfig M src/cpu/armltd/Makefile.inc A src/cpu/armltd/cortex-a53/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/timer.c 15 files changed, 408 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/33387/3/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/#/c/33387/3/src/mainboard/emulation/qemu-aarch64... PS3, Line 38: * Prior to Jul 2014 qemu aliased 0 to begining of RAM instead of flash 'begining' may be misspelled - perhaps 'beginning'?
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#4).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt -cpu cortex-a53 \ -bios build/coreboot.rom -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi doiasami1219@gmail.com --- M src/cpu/armltd/Kconfig M src/cpu/armltd/Makefile.inc A src/cpu/armltd/cortex-a53/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/timer.c 15 files changed, 408 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/4
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 5:
This change is ready for review.
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
(7 comments)
This change is ready for review.
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 6: ## This software is licensed under the terms of the GNU General Public
Use the SPDX identifier instead of adding the whole licence: […]
OK. I updated all files to use the SPDX identifier.
According to the SPDX site (https://spdx.org/licenses/), GPL 2.0 supports - GPL-2.0-only - GPL-2.0-or-later
I chose GPL-2.0-or-later.
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 20: # qemu-system-aarch64 -M virt -m 1024M -cpu cortex-a53 -nographic -bios build/coreboot.rom
Can you move this to Kconfig.name as a help entry, so it shows up in make menuconfig.
Yes. I moved it to a help section in Kconfig.name.
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 56: ARM
QEMU?
Ack
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 36: works
Does it work with -machine secure=on to emulate EL3?
Yes, it does. I will remove this function.
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 28: _eprogram
Keep in mind that it need to return the same address in every stage, but _eprogram changes in every […]
OK. Thank you. Is the rule to return the same address in every stage specify only for ARMv8?
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/mainboard.h:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 1: /*
I would do SPDX headers for all the files you are adding.
Ack
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 47: VIRT_FLASH_START
Need to be placed in RAM in order for heap to work. […]
Can I decide SRAM addresses by myself? Because the virt machine doesn't seem to have SRAM address according to the implementation in QEMU (https://github.com/qemu/qemu/blob/master/hw/arm/virt.c).
Or is it ok to make BOOTBLOCK place inside DRAM?
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
(1 comment)
This change is ready for review.
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/#/c/33387/6/src/mainboard/emulation/qemu-aarch64... PS6, Line 47: VIRT_FLASH_START
There's no SRAM, so placing it in DRAM is fine. […]
Does the placing BOOTBLOCK in DRAM mean it doesn't use Cache-As-RAM? Did the old armv8 port set up DRAM in bootblock_custom.S or is it fine just doing a copy bootblock code?
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
(8 comments)
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG@9 PS11, Line 9: WIP Still a WIP?
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c File src/arch/arm64/armv8/cache.c:
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c@a42 PS11, Line 42: I don't see any functional changes to this method (other than removing the static). Is there a reason it was changed?
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig@8 PS11, Line 8: CPU_ARMLTD_CORTEX_A53 Remove the the empty branch.
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 6: * SPDX-License-Identifier: GPL-2.0-or-later I think coreboot is typically a GPL-2.0-only project?
The checkpatch script typically prefers the SPDX line as its own comment: https://github.com/torvalds/linux/blob/db54615e21419c3cb4d699a0b0aa16cc44d0e...
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 20: EL1 I thought you were able to run this in EL3?
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 21: 0x60000000 #define this constant and all the other constants.
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 24: 0x4c000000 #define register addresses
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 31: 4 #define regiser offsets
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
Patch Set 11:
(1 comment)
This change is ready for review.
Did you get the console working? Can you provide an example of the console output?
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 11:
(8 comments)
This change is ready for review.
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/33387/11//COMMIT_MSG@9 PS11, Line 9: WIP
Still a WIP?
Sorry, this is still WIP. The state changed to ready automatically when I replied.
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c File src/arch/arm64/armv8/cache.c:
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c@a42 PS11, Line 42:
I don't see any functional changes to this method (other than removing the static). […]
The result of this function doesn't change.
The reason why I changed this function is that the "static unsigned int" should be stored the BSS(or DATA) region but the current implementation is read-only and can't use a heap region.
In my understanding, we have 2 options. 1. Not use global variables in the bootblock. In this case, I read the code from the ROM directly and I can't use a heap region. 2. Relocate the bootblock code to DRAM. In this case, I can use a heap region but I need to write a relocating code in bootblock_custom.S.
This change tried to do the first solution.
Patrick suggested the second solution. ( https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... )
I personally want to do the first solution because it's simpler than the second one. What do you think?
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/#/c/33387/11/src/cpu/armltd/cortex-a53/Kconfig@8 PS11, Line 8: CPU_ARMLTD_CORTEX_A53
Remove the the empty branch.
Ack
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 6: * SPDX-License-Identifier: GPL-2.0-or-later
I think coreboot is typically a GPL-2.0-only project? […]
According to a lint checker, coreboot seems to support a GPL-2.0-or-later. I got lint errors when I used GPL-2.0-only.
https://github.com/coreboot/coreboot/blob/master/util/lint/lint-000-license-...
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 20: EL1
I thought you were able to run this in EL3?
Yes, I could run QEMU in EL3. I will remove this function.
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 21: 0x60000000
#define this constant and all the other constants.
Ack
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 24: 0x4c000000
#define register addresses
Ack
https://review.coreboot.org/#/c/33387/11/src/mainboard/emulation/qemu-aarch6... PS11, Line 31: 4
#define regiser offsets
I'm still working on this file so I will do it later. Thank you for your advice.
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 14:
(1 comment)
This change is ready for review.
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c File src/arch/arm64/armv8/cache.c:
https://review.coreboot.org/#/c/33387/11/src/arch/arm64/armv8/cache.c@a42 PS11, Line 42:
It will break as soon as someone else is trying to use BSS in the bootblock and isn't aware of this […]
OK. Thank you for your advice. I will revert this change and relocate BOOTBLOCK code into DRAM for the compatibility with other programs.
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 15:
I believe it's time to review.
I relocated BOOTBLOCK code into DRAM successfully and reverted the change in /arch/arm64/armv8/cache.c that means we can use a BSS section.
Now, I can make coreboot.rom for QEMU/AArch64 and execute it via: $ qemu-system-aarch64 -bios ./build/coreboot.rom -M virt,secure=on -cpu cortex-a53 -nographic -m 1024M
The result of this execution is "Payload not loaded" because I put an empty payload. However, The comment "Payload not loaded" indicates we are ready to pass the execution to the payload.
Could you review this CL?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 15:
(6 comments)
Patch Set 15:
I believe it's time to review.
I relocated BOOTBLOCK code into DRAM successfully and reverted the change in /arch/arm64/armv8/cache.c that means we can use a BSS section.
Now, I can make coreboot.rom for QEMU/AArch64 and execute it via: $ qemu-system-aarch64 -bios ./build/coreboot.rom -M virt,secure=on -cpu cortex-a53 -nographic -m 1024M
The result of this execution is "Payload not loaded" because I put an empty payload. However, The comment "Payload not loaded" indicates we are ready to pass the execution to the payload.
Could you review this CL?
Thank you for your work. I'd assume the mainboard port done as soon as you were able to boot a payload.
1) Please try to run a payload, for example a Linux kernel. This can easily be done by generating an uImage/FIT and selecting FIT payload or by selecting LinuxBoot payload. Right now it won't work, as the payload will be loaded to _dram.
It would be nice to use the FDT passed by qemu to coreboot, as right now we have to manually specify a FDT when building the uImage/FIT.
2) Please add Documentation/. It has to be written in markdown and is automatically converted by sphinx to HTML. It would nice to have a short chapter how to use this mainboard port, TODOs and a description why it's implemented the way it is.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start) doesn't boot rom pass FDT as argument?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 45: /* Jump to code in DRAM */ restore saved FDT pointer and pass it to bootblock
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 1: /* cbmem_recovery needs to be called in romstage, too
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 22: if (!dev) { I guess this is dead code and will never happen
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: ram_resource(dev, 0, VIRT_DRAM_START >> 10, discovered << 10); ram_resouce() should be called in "discover resources" phase, not in "enable" phase.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n); I think this file can be droped by simply selecting CONFIG_ARM64_USE_ARCH_TIMER
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 15:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: 0x10000 Is this an arbitrary number, or was it derived?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 24: 0x01040000 How was this constant derived? Should we move it to a #define?
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 15:
(13 comments)
Right now it won't work, as the payload will be loaded to _dram.
SELF payloads contain their own load address, so they should work as long as they got built for the right address. FIT payloads should automatically find a free spot, but you're right that it's better to leave some room for it at the beginning of DRAM.
It would be nice to use the FDT passed by qemu to coreboot, as right now we have to manually specify a FDT when building the uImage/FIT.
I'd like to avoid adding infrastructure to receive an FDT from masked ROM and pipe it through all stages for use in a FIT image, because that's a very QEMU-specific use case and doesn't make much sense on real hardware. An FDT in ROM can't get updated so it's generally a bad idea, and the FIT model of bundling the FDT with the kernel works much better. For the QEMU case, I think it would be easier to just take whatever FDT they would pass and manually add it to FIT images you want to run on it.
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... PS15, Line 1: config CPU_ARMLTD_CORTEX_A53 Note that src/cpu is pretty much deprecated, at least for non-x86. The remaining Arm stuff there is just still there because nobody had the time to clean it up, but all Arm chips added in the last ~5 years only use src/soc. For QEMU, I think it would be best to either keep everything in the mainboard directory, or create a new src/soc/qemu/arm64.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: select ARCH_RAMSTAGE_ARMV8_64 If you select these here directly, what does the CPU_ARMLTD_CORTEX_A53 even do?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 26: b copy_code nit: I think the branch should be unnecessary because .p2align should fill with NOPs in a text section.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 32: ldp q0, q1, [x1], 32 /* Load 32 bytes */ Should be okay to use memcpy() here instead? You can put the stuff you want preserved into x19-x29 instead.
Also, we don't really use SIMD registers anywhere else, even if it works for QEMU I'd just stick to GPRs instead here.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 50: main Sorry, where's this main()? I don't see it.
It would be best if you could reuse src/lib/bootblock.c here, but you'd have to change the Makefile first because that currently doesn't get built for BOOTBLOCK_CUSTOM (we can probably just remove that restriction and have the boards that want a custom C entry point use a different function name instead).
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 40: int probe_ramsize(void) Can this reuse what Patrick is doing in CB:33934?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/debug.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: * Just debugging. I will remove it later. When is later? Looks like this is unused.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 10: device i2c 6 on end # Fake component for testing Note that Arm devices usually don't use devicetree.cb for peripherals or board components, so having this here is odd.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: #define VIRT_FLASH_START 0x00000000 nit: convention is to call these _BASE, not _START
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 36: #define VIRT_DRAM_START 0x40000000 For things that appear in memlayout, the convention is to have the constant directly in memlayout rather than using defines (and using the memlayout symbol to reference it in code). The idea is that you can see where what is from just looking at the memlayout file, without having to cross-reference it with a bunch of headers.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 1: /*
cbmem_recovery needs to be called in romstage, too
arm64/romstage.c main() calls cbmem_initialize_empty(), that should be enough. Arm devices usually don't recover CBMEM in romstage (they just initialize it empty), because they don't wake from S3 through firmware.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 29: cbmem_recovery(0); Why is this here? main() from hardwaremain.c calls cbmem_initialize(), that should be all you need.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 17: DRAM_START(VIRT_DRAM_START) Like Patrick said, it's best to leave some free space at the beginning of DRAM for FIT images because the Linux kernel likes to be loaded at the start of physical memory on arm64. I'd recommend 512MB if you can spare that much.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 15:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 1: /*
arm64/romstage.c main() calls cbmem_initialize_empty(), that should be enough. […]
I wasn't aware of that, thanks.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 29: cbmem_recovery(0);
Why is this here? main() from hardwaremain.c calls cbmem_initialize(), that should be all you need.
I guess it's copied from another emulated board, doing it wrong, too.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#16).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/timer.c 16 files changed, 404 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/16
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 16:
(19 comments)
Thank you for your reviews. I add a documentation, deleted cpu/armltd/cortex-a53, and updated files. I have some things I don't understand yet.
1. I'm trying to add a payload LinuxBoot by selecting it via 'make menuconfig'. However, I got the following error: make LINUXBOOT_CROSS_COMPILE=aarch64-linux-gnu- ... cp: -r not specified; omitting directory '../../../' make[2]: *** [targets/linux.mk:112: linuxboot/target.dtb] Error 1 make[1]: *** [Makefile:55: kernel] Error 2 make: *** [payloads/external/Makefile.inc:266: linuxboot] Error 2
I think this error relates to the second question about FDT.
2. What is an FDT and how can I use it? I looked it up and found an FDT is a flattened device tree which is used especially for ARM system. We can configure peripherals via an FDT dynamically. How can I pass an FDT when building the image?
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... PS15, Line 1: config CPU_ARMLTD_CORTEX_A53
Note that src/cpu is pretty much deprecated, at least for non-x86. […]
I deleted cpu/armld/cortex-a53 because they have nothing functions for now. They just existed for future functions.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: select ARCH_RAMSTAGE_ARMV8_64
If you select these here directly, what does the CPU_ARMLTD_CORTEX_A53 even do?
cpu/armld/cortex-a53 have nothing functions for now. So I deleted them.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
doesn't boot rom pass FDT as argument?
Sorry, I only have a few knowledge about FDT. How can I pass it as an argument?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 26: b copy_code
nit: I think the branch should be unnecessary because . […]
Ack
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 32: ldp q0, q1, [x1], 32 /* Load 32 bytes */
Should be okay to use memcpy() here instead? You can put the stuff you want preserved into x19-x29 i […]
Yes, it's ok. I used normal instructions and general purpose registers instead.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 45: /* Jump to code in DRAM */
restore saved FDT pointer and pass it to bootblock
Sorry, where is the FDT pointer?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 50: main
Sorry, where's this main()? I don't see it. […]
main() is defined at src/lib/bootblock.c. I'm now using bootblock_custom.S by "select BOOTBLOCK_CUSTOM" in src/mainboard/emulation/qemu-aarch64/Kconfig. Isn't it enough?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 40: int probe_ramsize(void)
Can this reuse what Patrick is doing in CB:33934?
It seems good. I will reuse it. The CL is now on the review so I added TODO comment, for now, to reuse it after the CL is merged.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/debug.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: * Just debugging. I will remove it later.
When is later? Looks like this is unused.
Sorry, this is already unused. I removed it.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 10: device i2c 6 on end # Fake component for testing
Note that Arm devices usually don't use devicetree. […]
Thank you for your comment. Is it enough to pass FDT for ARM to setup device configurations? I got the following error when I remove this file: make: *** No rule to make target 'src/mainboard/emulation/qemu-aarch64/devicetree.cb', needed by 'build/mainboard/emulation/qemu-aarch64/static.c'.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: #define VIRT_FLASH_START 0x00000000
nit: convention is to call these _BASE, not _START
Ack
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 36: #define VIRT_DRAM_START 0x40000000
For things that appear in memlayout, the convention is to have the constant directly in memlayout ra […]
I created this file because I wanted to use these addresses in mmio.c and mainboard.c. I avoided defining addresses in multiple files. But I can move these addresses to memlayout.ld. Which is better?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 22: if (!dev) {
I guess this is dead code and will never happen
OK. I removed the if-statement.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: ram_resource(dev, 0, VIRT_DRAM_START >> 10, discovered << 10);
ram_resouce() should be called in "discover resources" phase, not in "enable" phase.
Sorry, does "discover resources" mean BS_DEV_RESOURCES?
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 29: cbmem_recovery(0);
I guess it's copied from another emulated board, doing it wrong, too.
Sorry, I copied this file from mainboard/emulation/qemu-armv7/. I removed this line.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 17: DRAM_START(VIRT_DRAM_START)
Like Patrick said, it's best to leave some free space at the beginning of DRAM for FIT images becaus […]
OK, thank you for your advice. I made space more than 512MiB at the beginning of the DRAM for FIT images.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: 0x10000
Is this an arbitrary number, or was it derived?
This is an arbitrary number as long as a region doesn't overlap. In this case, STACK starts just after BOOTBLOCK.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 24: 0x01040000
How was this constant derived? Should we move it to a #define?
This is the number just after the end of RAMSTAGE. We can put TTB anywhere as long as a region doesn't overlap but I currently don't use TTB.
I moveed numbers to #define.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n);
I think this file can be droped by simply selecting CONFIG_ARM64_USE_ARCH_TIMER
src/arch/arm64/arch_timer.c will be enable when we select CONFIG_ARM64_USE_ARCH_TIMER. However, it doesn't have init_timer() then it should cause the error "undefined reference to `init_timer'".
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 16:
(3 comments)
Patch Set 16:
(19 comments)
Thank you for your reviews. I add a documentation, deleted cpu/armltd/cortex-a53, and updated files. I have some things I don't understand yet.
I'm trying to add a payload LinuxBoot by selecting it via 'make menuconfig'. However, I got the following error: make LINUXBOOT_CROSS_COMPILE=aarch64-linux-gnu- ... cp: -r not specified; omitting directory '../../../' make[2]: *** [targets/linux.mk:112: linuxboot/target.dtb] Error 1 make[1]: *** [Makefile:55: kernel] Error 2 make: *** [payloads/external/Makefile.inc:266: linuxboot] Error 2
I think this error relates to the second question about FDT.
What is an FDT and how can I use it? I looked it up and found an FDT is a flattened device tree which is used especially for ARM system. We can configure peripherals via an FDT dynamically. How can I pass an FDT when building the image?
When generating the uImage, you must include a DTB. When you build LinuxBoot, you need to specify a "Compiled devicetree file", that is a DTB. too.
You can gernate one from qemu by runing qemu-system-aarch64 -machine virt-2.9,dumpdtb=file.dtb ... Please convert the DTB to DTS and store it in the mainboard directory.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
Sorry, I only have a few knowledge about FDT. […]
boot rom is the code run by the SoC itself, before coreboot's bootblock is executed. I guess qemu passes a pointer to FDT in x0. As Julius said it's likely easier to add a static DTS file to the mainboard directory.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: ram_resource(dev, 0, VIRT_DRAM_START >> 10, discovered << 10);
Sorry, does "discover resources" mean BS_DEV_RESOURCES?
have a look at "mainboard/emulation/qemu-i440fx/northbridge.c" It calls ram_resource in "cpu_pci_domain_read_resources":
static struct device_operations pci_domain_ops = { .read_resources = cpu_pci_domain_read_resources,
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n);
src/arch/arm64/arch_timer.c will be enable when we select CONFIG_ARM64_USE_ARCH_TIMER. […]
Have a look at "soc/qualcomm/sdm845/timer.c" It just implements init_timer(). You can do that in a similar way.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 16:
(8 comments)
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
boot rom is the code run by the SoC itself, before coreboot's bootblock is executed. […]
Does it make sense to store this DTS in coreboot? It doesn't really have anything to do with coreboot. How about providing instructions (or a script) on how to generate it and add it to a FIT image instead? That way, it can't go stale if QEMU updates.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 50: main
main() is defined at src/lib/bootblock.c. I'm now using bootblock_custom. […]
Oohhhh... now I get how you did this. You added ../../../lib/bootblock.c manually in the mainboard Makefile.
Yeah, that's an ugly hack, let's not do that. We should just fix BOOTBLOCK_CUSTOM so that that function is always available. Can you please change the other BOOTBLOCK_CUSTOM boards (I think there's only 3) in a separate CL to rename their bootblock main() functions into something else (e.g. tegra124_main() and the like), and then remove the BOOTBLOCK_CUSTOM compile guard for bootblock.c in src/lib/Makefile?
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 12: .org 0 Does this actually do anything? I think you can take it out.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 13: ic ialluis Do you actually need this?
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 30: x19 nit: this might as well be x3 since you're not calling other functions right now. (I still think you could just call memcpy() instead?)
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 43: ldr x1, =_bootblock While this works it looks pretty confusing to me. Why not just:
1. get the address of main 2. subtract _flash 3. add _bootblock 4. jump
? So something like
/* calculate relocation offset between bootblock in flash and in DRAM */ ldr x0, =_flash ldr x1, =_bootblock sub x1, x1, x0
/* jump to main() in DRAM */ ldr x0, =main add x0, x0, x1 bl x1
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 36: #define VIRT_DRAM_START 0x40000000
I created this file because I wanted to use these addresses in mmio.c and mainboard.c. […]
Commonly we define MMIO blocks (e.g. your GPIO, RTC, etc. here) in addressmap.h and actual memory (e.g. SRAM, DRAM, in your case I'd also say FLASH) in memlayout.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 28: VIRT_DRAM_BASE + FIT_SPACE + GT_128KiB I'd suggest to use literals for all of these and not add multiple things together. Like I said, one of the main goals of this file is to have an easy reference to look up what is at what address (e.g. if you're trying to understand what addresses from log lines or crash dumps are). That just gets harder and harder the more indirection you have in here. (Compare how other memlayout files like rockchip/rk3399 or mediatek/mt8183 look like.)
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#17).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 406 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/17
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 16:
(10 comments)
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
Does it make sense to store this DTS in coreboot? It doesn't really have anything to do with coreboo […]
Creating the util for adding DTS to a FIT image sounds good. In this case, users should be: 1. build a FIT payload 2. add a DTS to a FIT image by new util 3. make coreboot.rom with an empty payload 4. add the payload to coreboot.rom by util/cbfstool
Is the flow correct? I will write the step in Documentation/.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 50: main
Oohhhh... now I get how you did this. You added ../../../lib/bootblock. […]
I see. OK, I created a new CL to deal with the problem. I found the 3 SoCs to use BOOTBLCOK_CUSTOM. - nvidia/tegra124 - nvidia/tegra240 - cavium/cn81xx
Could you review this CL? https://review.coreboot.org/c/coreboot/+/34250
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 12: .org 0
Does this actually do anything? I think you can take it out.
No, it's just explicit for developers. I removed it.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 13: ic ialluis
Do you actually need this?
No, it doesn't affect the output. Thank you for pointing it out.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 30: x19
nit: this might as well be x3 since you're not calling other functions right now. […]
Sorry, do you mean to use memcpy() after the jump to C code? Or is there memcpy() in instruction sets?
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 43: ldr x1, =_bootblock
While this works it looks pretty confusing to me. Why not just: […]
Thank you for your simpler way. I changed your code a little bit but I used it.
/* jump to main() in DRAM */ adr x0, main add x0, x0, x1 br x0
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 36: #define VIRT_DRAM_START 0x40000000
Commonly we define MMIO blocks (e.g. your GPIO, RTC, etc. here) in addressmap. […]
I moved FLASH_BASE and DRAM_BASE to memlayout.ld and other definitions remain in this file.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: ram_resource(dev, 0, VIRT_DRAM_START >> 10, discovered << 10);
have a look at "mainboard/emulation/qemu-i440fx/northbridge.c" […]
Thank you for the reference. I updated this file but I'm not sure it's perfect. Please tell me if I understand it wrongly.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 28: VIRT_DRAM_BASE + FIT_SPACE + GT_128KiB
I'd suggest to use literals for all of these and not add multiple things together. […]
Thank you for the references. I defined addresses in a simpler way.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n);
Have a look at "soc/qualcomm/sdm845/timer.c" […]
Thank you for the reference. Sorry, I made a mistake and this file can be dropped. I deleted this file instead of implementing init_timer().
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#18).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 406 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/18
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 18:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 20: static void mainboard_read_resources(struct device *dev) looks good
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n);
Thank you for the reference. Sorry, I made a mistake and this file can be dropped. […]
Oh yeah, you are right. CNTFRQ is already set by qemu.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 18:
(12 comments)
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 27: bootblock-y += ../../../lib/bootblock.c If you have both of your CLs on the same Git branch (first that other CL, then this one) you can upload them both at once and Gerrit will recognize the implicit dependency.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
Creating the util for adding DTS to a FIT image sounds good. In this case, users should be: […]
Right, sounds good.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 30: x19
Sorry, do you mean to use memcpy() after the jump to C code? Or is there memcpy() in instruction set […]
I mean you can call memcpy() from here, like this:
bl memcpy dmb sy
Your code already sets up all the arguments right (destination in x0, source in x1, size in x2), so you should be all set. memcpy is implemented in assembly (see src/arch/arm64/memcpy.S) and doesn't use the stack, so it should be safe to call in this environment. (It doesn't do the cache line alignment, though, so if you find it to be significantly slower than your code here it's fine to keep it like this as well. But does the cache line even matter for QEMU? I would be very surprised if it emulated effects like that...)
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 43: br x0 nit: technically more correct would be 'blr'
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 45: after_relocate: You don't need this anymore
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 8: chip drivers/generic/generic # I2C0 controller I still think this shouldn't be here. It doesn't do anything and doesn't refer to anything real. I'd just leave this file empty (or does that not work?).
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 18: #define VIRT_DRAM_BASE 0x40000000 You shouldn't need this, it's already in memlayout
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 23: >> 10 Prefer
x / KiB
to
x >> 10
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 23: VIRT_DRAM_BASE This should be (uintptr_t)_dram
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 37: * 0x6111_0000..: TTB You shouldn't need extra comments to explain the layout if you just write this file itself to already make the layout obvious (see below).
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 43: DRAM_START(VIRT_DRAM_BASE) No, sorry, this is still not what I meant. You should just write
DRAM_START(0x40000000)
here. No need to #define anything. See how src/soc/mediatek/mt8183/include/soc/memlayout.ld looks.
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mmio.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 14: // TODO: Return VIRT_SECURE_UART_BASE when QEMU works on a secure mode. nit: please use /* C89 comments */, not // C99 comments
(I also don't really understand what the comment is saying. I thought this is running in secure mode (i.e. EL3) already?)
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#19).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 374 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/19
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#20).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 384 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/20
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 19:
(10 comments)
I'm not sure how to add DTS to a FIT image. Currently, I got a FIT kernel image by: $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- $ mkimage -A arm64 -O linux -T kernel -C gzip -d vmlinux uImage $ mkimage -f auto -A arm64 -O linux -T kernel -C none -a 40000000 -e 0 -c "Kernel 4.4 image for production devices" -d uImage fitImage
Also, linux kernel seems too big as a payload. How can I deal with that? E: Could not add [fitImage, 304985299 bytes (297837 KB)@0x0]; too big?
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 27: bootblock-y += ../../../lib/bootblock.c
If you have both of your CLs on the same Git branch (first that other CL, then this one) you can upl […]
That's good to know! I rebased this CL on the CL 34250 and deleted the TODO comment and the bootblock-y line.
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 30: x19
I mean you can call memcpy() from here, like this: […]
I didn't notice that there is memcpy in src/arch/arm64/memcpy.S. It can be simpler. I think it doesn't affect the speed so I kept using memcpy. Thank you!
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 43: br x0
nit: technically more correct would be 'blr'
Ack
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 45: after_relocate:
You don't need this anymore
Ack
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 8: chip drivers/generic/generic # I2C0 controller
I still think this shouldn't be here. It doesn't do anything and doesn't refer to anything real. […]
When I deleted this file or made this file empty, I got the error: (....) SCONFIG mainboard/emulation/qemu-aarch64/devicetree.cb line 8: : syntax error make: *** [Makefile.inc:598: build/mainboard/emulation/qemu-aarch64/static.c] Error 1
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 23: >> 10
Prefer […]
Ack
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 23: VIRT_DRAM_BASE
This should be (uintptr_t)_dram
Ack
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 37: * 0x6111_0000..: TTB
You shouldn't need extra comments to explain the layout if you just write this file itself to alread […]
I removed lines from "0x0000_0000..0x0080_0000: Flash memory" to "0x6111_0000..: TTB".
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 43: DRAM_START(VIRT_DRAM_BASE)
No, sorry, this is still not what I meant. You should just write […]
OK. I put on the number instead of using #define.
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mmio.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 14: // TODO: Return VIRT_SECURE_UART_BASE when QEMU works on a secure mode.
nit: please use /* C89 comments */, not // C99 comments […]
I can get debug messages by VIRT_UART_BASE but coreboot doesn't output anything to my console by VIRT_SECURE_UART_BASE. So, I think QEMU uses the normal (non-secure) uart address. The TODO comment might be good to be removed.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 20: Code-Review+2
(1 comment)
LGTM, except for the documentation. I think it's okay to get this in first and fix the docs later unless someone has a concern about that.
I'm not sure how to add DTS to a FIT image. Currently, I got a FIT kernel image by: $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- $ mkimage -A arm64 -O linux -T kernel -C gzip -d vmlinux uImage $ mkimage -f auto -A arm64 -O linux -T kernel -C none -a 40000000 -e 0 -c "Kernel 4.4 image for production devices" -d uImage fitImage
You need to supply an .its script that tells it where your kernel binary and the FDT file is. See u-boot/doc/uImage.FIT/howto.txt for details.
Also, linux kernel seems too big as a payload. How can I deal with that? E: Could not add [fitImage, 304985299 bytes (297837 KB)@0x0]; too big?
Yeah, 300MB is likely not going to work for multiple reasons. Do you have a giant initramfs in there? Try to cut that down to the absolute necessary (e.g. just a simple shell) and see if that works.
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mmio.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 14: // TODO: Return VIRT_SECURE_UART_BASE when QEMU works on a secure mode.
I can get debug messages by VIRT_UART_BASE but coreboot doesn't output anything to my console by VIR […]
Yes, unless you actually know something that needs to be done here in the future, you should probably remove the TODO.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#21).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md A configs/config.emulation_qemu_aarch64 A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 383 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/21
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 21:
LGTM, except for the documentation. I think it's okay to get this in first and fix the docs later unless someone has a concern about that.
I will update the documentation after I create new util for making a payload.
I created new CL for adding new util tool that enables to make a payload for QEMU/AArch64. It's still WIP but you can see what I want to do. Could you take a look at it and tell me something wrong?
https://review.coreboot.org/c/coreboot/+/34367
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 21:
(9 comments)
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 1: # QEMU AArch64 emulator must be referenced from index.md
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 7: 2. Add a DTS to a FIT image by the util (I'm developing it now.) How to get the DTS?
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 12: TODO: Write the command how to build a FIT image. already described here: https://doc.coreboot.org/lib/payloads/fit.html You could reference it here, but please don't duplicate.
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 15: TODO: Make the util and write the command how to use the util Already done automatically if you select LinuxBoot payload.
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 17: ### 3. Make coreboot.rom with an emply payload seems to be general workflow how to select a board, not worth of documenting it
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 30: ### 4. Add the payload to coreboot.rom by util/cbfstool wrong. Use Linux/LinuxBoot payload instead
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 34: ``` ```bash
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 38: - The default CPU in QEMU for AArch64 is a cortex-a15 which is 32-bit ARM CPU. You need to specify 64-bit ARM CPU via `-cpu cortex-a53`. move to top as it's important when running qemu for this board
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... PS21, Line 26: BOOTBLOCK(0x60010000, 64K) that assumes 512+32MiB of DRAM specified with -m. That needs to be documented.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#22).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md M src/lib/fit_payload.c A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 16 files changed, 382 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/22
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 22:
(9 comments)
I modified new file src/lib/fit_payload.c because extract() returns false even though initrd.size is already 0. I modified it to call extract() only when initrd.size is more than 0. The size of LinuxBoot's ramdisk seems to be 0 even with selecting 'Build initramfs' via 'make menuconfig'.
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 1: # QEMU AArch64 emulator
must be referenced from index. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 7: 2. Add a DTS to a FIT image by the util (I'm developing it now.)
How to get the DTS?
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 12: TODO: Write the command how to build a FIT image.
already described here: https://doc.coreboot.org/lib/payloads/fit.html […]
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 15: TODO: Make the util and write the command how to use the util
Already done automatically if you select LinuxBoot payload.
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 17: ### 3. Make coreboot.rom with an emply payload
seems to be general workflow how to select a board, not worth of documenting it
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 30: ### 4. Add the payload to coreboot.rom by util/cbfstool
wrong. […]
Sorry, what did you mean?
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 34: ```
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 38: - The default CPU in QEMU for AArch64 is a cortex-a15 which is 32-bit ARM CPU. You need to specify 64-bit ARM CPU via `-cpu cortex-a53`.
move to top as it's important when running qemu for this board
I moved the "Running coreboot in QEMU" column to the top of this page.
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... PS21, Line 26: BOOTBLOCK(0x60010000, 64K)
that assumes 512+32MiB of DRAM specified with -m. That needs to be documented.
OK. I added "You need to specify the size of memory more than 544 MiB because 512 MiB is reserved for a FIT image." to the documentation.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 22:
(5 comments)
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 2: This page discribes how to build and run coreboot for QEMU/AArch64. You can use LinuxBoot via `make menuconfig` or an arbitrary FIT image as a payload for QEMU/AArch64. please limit to 72char per line. Applies to all lines.
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 16: 2. Build a FIT image with a DTB whitespace
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 27: See [Flattened uImage Tree documentation](https://doc.coreboot.org/lib/payloads/fit.html) for more details. ../../lib/payloads/fit
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 29: ### 3. Add a FIT image to coreboot.rom whitespace
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c File src/lib/fit_payload.c:
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c@249 PS22, Line 249: if (config->ramdisk && initrd.size > 0) { that's unrelated. Please do it in a seperate commit.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#23).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md M src/lib/fit_payload.c A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 16 files changed, 370 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/23
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#24).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md M src/lib/fit_payload.c A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 16 files changed, 364 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/24
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#25).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 363 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/25
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#26).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 375 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/26
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 26:
(5 comments)
I reverted the mainboard.c because ops->read_resources() is never called. I think the reason why read_resources isn't called is devicetree.cb is not enough but ARM systems don't rely on devicetree.cb, right?
I can understand ram_resource() should be called in device operations but I didn't know how to deal with it.
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 2: This page discribes how to build and run coreboot for QEMU/AArch64. You can use LinuxBoot via `make menuconfig` or an arbitrary FIT image as a payload for QEMU/AArch64.
please limit to 72char per line. Applies to all lines.
Done
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 16: 2. Build a FIT image with a DTB
whitespace
Done
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 27: See [Flattened uImage Tree documentation](https://doc.coreboot.org/lib/payloads/fit.html) for more details.
../.. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/22/Documentation/mainboard/em... PS22, Line 29: ### 3. Add a FIT image to coreboot.rom
whitespace
Done
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c File src/lib/fit_payload.c:
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c@249 PS22, Line 249: if (config->ramdisk && initrd.size > 0) {
that's unrelated. Please do it in a seperate commit.
OK. I reverted this change in the CL and created new CL (https://review.coreboot.org/c/coreboot/+/34535). Could you review this CL?
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 26:
(3 comments)
I reverted the mainboard.c because ops->read_resources() is never called. I think the reason why read_resources isn't called is devicetree.cb is not enough but ARM systems don't rely on devicetree.cb, right?
I think this is a special case since the mainboard is the root device and src/device/device.c#read_resources() only works on the child devices of the device it was called with, so the mainboard read_resources() never gets called. I think just putting it in enable is perfectly fine, the board doesn't really use the full boot state machine anyway so nobody cares.
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... PS26, Line 19: reserved for a FIT image nit: it's reserved for the kernel, technically, not the FIT image
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 8: chip mainboard/emulation/qemu-aarch64 I'm not an sconfig expert, but I think the mainboard is already automatically added as the root device and adding it separately here is incorrect. None of the other boards do that.
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 9: chip drivers/generic/generic # I2C0 controller Does this entry actually serve a purpose? It does nothing and means nothing, I think you should probably just remove it.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#27).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 1024M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/mainboard.h A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 373 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/27
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 27:
(3 comments)
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... PS26, Line 19: reserved for a FIT image
nit: it's reserved for the kernel, technically, not the FIT image
Thank you!
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 8: chip mainboard/emulation/qemu-aarch64
I'm not an sconfig expert, but I think the mainboard is already automatically added as the root devi […]
I removed the mainboard part. It doesn't affect any output messages at all so probably you're right. The mainboard is already added automatically.
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 9: chip drivers/generic/generic # I2C0 controller
Does this entry actually serve a purpose? It does nothing and means nothing, I think you should prob […]
This devicetree.cb doesn't have any effect but coreboot needs devicetree.cb during building. This is just a fake file.
If this file is empty, syntax error happens. So we need something not-empty devicetree.cb.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 27:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 39: See [Flattened uImage Tree documentation](../../lib/payloads/fit) for more details. ../../lib/payloads/fit.md
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 9: chip drivers/generic/generic # I2C0 controller
This devicetree.cb doesn't have any effect but coreboot needs devicetree.cb during building. […]
I remember something similar. I'm fine with it, as there seem to be other issue (like Arm Trusted Firmware) that should be worked on first.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 27: Code-Review+1
(5 comments)
Boot log looks good: https://0paste.com/32642
I didn't try booting a payload.
https://review.coreboot.org/c/coreboot/+/33387/27//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33387/27//COMMIT_MSG@9 PS27, Line 9: "adds a new board"
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 37: an
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 37: an
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... PS27, Line 49: 1 Is this arbitrary?
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... PS27, Line 8: Add a comment saying that the only reason this is here is to keep the compiler happy.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#28).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 2048M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 315 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/28
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#29).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 2048M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 316 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/29
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 29:
(6 comments)
I adopted the change of the new file src/lib/ramdetect.c. I updated cbmem.c and mainboard.c to use new functions.
Boot log looks good: https://0paste.com/32642 I didn't try booting a payload.
It works well as long as it doesn't have a payload. I currently try to run coreboot.rom with the integrated LinuxBoot payload on QEMU but there seem to be problems.
https://review.coreboot.org/c/coreboot/+/33387/27//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33387/27//COMMIT_MSG@9 PS27, Line 9:
"adds a new board"
Done
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 37:
an
Done
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 37:
an
Done
https://review.coreboot.org/c/coreboot/+/33387/27/Documentation/mainboard/em... PS27, Line 39: See [Flattened uImage Tree documentation](../../lib/payloads/fit) for more details.
../../lib/payloads/fit. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... PS27, Line 49: 1
Is this arbitrary?
Instead of the function, I used new probe_ramsize() and probe_mb() defined at src/lib/ramdetect.c because the CL (https://review.coreboot.org/c/coreboot/+/33934) was merged.
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... PS27, Line 8:
Add a comment saying that the only reason this is here is to keep the compiler happy.
Done
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 29: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB qemu supports more than 512MiB of DRAM on that board, doesn't it? It should be set to the maximum that's possible with qemu on aarch64 virt.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 29: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 30: select Remove the comment.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#30).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 2048M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 318 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/30
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 30:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 30: select
Remove the comment.
Done
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
qemu supports more than 512MiB of DRAM on that board, doesn't it? […]
If DRAM_SIZR_MB is larger than 1024 with "-m 2048M" as a QEMU option, an exception happens. I think that's because it tries to call read32()/write32() to beyond the QEMU memory size. We can avoid the exception when we use "-m <large memory size>" on QEMU.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 30:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
If DRAM_SIZR_MB is larger than 1024 with "-m 2048M" as a QEMU option, an exception happens. […]
Yes, it seems to be an aarch64 feature. It'll raise a Synchronous External Abort (SEA) when you access something that is not memory. @Julius Can we disable exceptions probing for DRAM size?
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 30:
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
Yes, it seems to be an aarch64 feature. […]
You can register a custom exception handler and return EXC_RET_HANDLED from it (and adjust the instruction pointer if necessary, which it probably is here). See arm64/armv8/exception.c#test_exception as an example, you should be able to do something very similar (and make it set a global or something so you can tell when it happened).
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 9: chip drivers/generic/generic # I2C0 controller
I remember something similar. […]
Okay, fair enough, this could probably be fixed in sconfig but let's leave this here for now.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#32).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 2048M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c A src/mainboard/emulation/qemu-aarch64/romstage.c 15 files changed, 348 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/32
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
You can register a custom exception handler and return EXC_RET_HANDLED from it (and adjust the instr […]
I added a new file romstage.c that enables to set up a custom exception handler. I think it needs the same thing after exception_init() is called in the ramstage, but I'm not sure how to call the function to set up a custom exception handler in the ramstage.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
I added a new file romstage.c that enables to set up a custom exception handler. […]
No, don't do it like this, register it directly from probe_ramsize(). Ideally you should unregister it again when the probing is done, but I don't think we support that... so just make it return EXC_RET_IGNORED afterwards.
You should also have the handler set a global so probe_ramsize() can tell whether the access caused an exception or not.
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
No, don't do it like this, register it directly from probe_ramsize(). […]
probe_ramsize() is now commonized for qemu-riscv, qemu-armv7, and qemu-aarch64, but a Synchronous External Abort is the feature of an aarch64, right? I believe other boards (riscv and armv7) don't need to register a custom exception handler.
Instead of registering it directly from probe_ramsize(), I can register it just before probe_ramsize() is called in the files in mainboard/emulation/qemu-aarch64/.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#33).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 2048M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/exception.c A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/include/mainboard/exception.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 16 files changed, 373 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/33
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 33:
I now added skip_exception(), which is the function to register an exception handler to update an instruction pointer to next instruction, and call it before ram_probe() is called.
However, it doesn't work well yet. I can see "exception _sync_sp_el3" when I try to read the memory over its size.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 33:
(2 comments)
I think you should do the probe_ramsize() changes in a separate patch, it should be done outside the qemu-aarch64 mainboard and doesn't really belong together with this.
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
probe_ramsize() is now commonized for qemu-riscv, qemu-armv7, and qemu-aarch64, but a Synchronous Ex […]
Yes, but this still needs to be integrated there, not hacked around it. You can just add an if (CONFIG(ARCH_ARM64)) in the probe_ramsize() code to special case the right parts (and again, you shouldn't just mask the exception, you should use the exception to figure out whether the address was accessible or not... so this essentially replaces most/all of probe_mb() from the generic implementation). You can also add a sort of arch_probe_memory() function with a __weak default implementation in src/lib and an override in src/arch/arm64 if you prefer that.
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/exception.c:
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... PS33, Line 19: return EXC_RET_IGNORED; When you want it to skip the exception, it needs to return EXC_RET_HANDLED. Afterwards, when you no longer want it to skip (i.e. you want to get normal crash dumps again), it should return IGNORED. So this needs to depend on some global state that you change from the outside.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#34).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/include/mainboard/exception.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 330 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/34
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 34: Code-Review+1
(47 comments)
Sorry for lots of "Done" comments. It's just to make all comments marked as a resolved.
Supporting QEMU/AArch64 is not perfect yet but I think it's enough to support a base feature.
I will create 2 follow-up patches in a different CL to support QEMU/AArch64 perfectly: 1. Update probe_ramsize() for armv8 to avoid an exception happening when it tries to access an address more than its memory. 2. The integrated LinuxBoot doesn't work well yet. I will investigate why it doesn't work and fix it.
https://review.coreboot.org/c/coreboot/+/33387/11//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/33387/11//COMMIT_MSG@9 PS11, Line 9: WIP
Sorry, this is still WIP. The state changed to ready automatically when I replied.
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 30: ### 4. Add the payload to coreboot.rom by util/cbfstool
Sorry, what did you mean?
Done
https://review.coreboot.org/c/coreboot/+/33387/21/Documentation/mainboard/em... PS21, Line 38: - The default CPU in QEMU for AArch64 is a cortex-a15 which is 32-bit ARM CPU. You need to specify 64-bit ARM CPU via `-cpu cortex-a53`.
I moved the "Running coreboot in QEMU" column to the top of this page.
Done
https://review.coreboot.org/c/coreboot/+/33387/11/src/arch/arm64/armv8/cache... File src/arch/arm64/armv8/cache.c:
https://review.coreboot.org/c/coreboot/+/33387/11/src/arch/arm64/armv8/cache... PS11, Line 42:
OK. Thank you for your advice. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... File src/cpu/armltd/cortex-a53/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/cpu/armltd/cortex-a53/... PS15, Line 1: config CPU_ARMLTD_CORTEX_A53
I deleted cpu/armld/cortex-a53 because they have nothing functions for now. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 6: ## This software is licensed under the terms of the GNU General Public
OK. I updated all files to use the SPDX identifier. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 20: # qemu-system-aarch64 -M virt -m 1024M -cpu cortex-a53 -nographic -bios build/coreboot.rom
Yes. I moved it to a help section in Kconfig.name.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: select ARCH_RAMSTAGE_ARMV8_64
cpu/armld/cortex-a53 have nothing functions for now. So I deleted them.
Done
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Kconfig:
https://review.coreboot.org/c/coreboot/+/33387/29/src/mainboard/emulation/qe... PS29, Line 48: config DRAM_SIZE_MB
Yes, but this still needs to be integrated there, not hacked around it. […]
I see. I will update probe_ramsize() in a different patch. Thank you.
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 27: bootblock-y += ../../../lib/bootblock.c
That's good to know! I rebased this CL on the CL 34250 and deleted the TODO comment and the bootbloc […]
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 36: works
Yes, it does. I will remove this function.
Done
https://review.coreboot.org/c/coreboot/+/33387/11/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/11/src/mainboard/emulation/qe... PS11, Line 6: * SPDX-License-Identifier: GPL-2.0-or-later
According to a lint checker, coreboot seems to support a GPL-2.0-or-later. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/11/src/mainboard/emulation/qe... PS11, Line 20: EL1
Yes, I could run QEMU in EL3. I will remove this function.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: ENTRY(_start)
Right, sounds good.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 32: ldp q0, q1, [x1], 32 /* Load 32 bytes */
Yes, it's ok. I used normal instructions and general purpose registers instead.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 45: /* Jump to code in DRAM */
Sorry, where is the FDT pointer?
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 50: main
I see. OK, I created a new CL to deal with the problem. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/bootblock_custom.S:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 12: .org 0
No, it's just explicit for developers. I removed it.
Done
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 13: ic ialluis
No, it doesn't affect the output. Thank you for pointing it out.
Done
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 30: x19
I didn't notice that there is memcpy in src/arch/arm64/memcpy.S. It can be simpler. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 43: ldr x1, =_bootblock
Thank you for your simpler way. I changed your code a little bit but I used it. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 28: _eprogram
Yes, cbmem_top() must return the same address in every stage. If your code does that it's fine.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 40: int probe_ramsize(void)
It seems good. I will reuse it. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/cbmem.c:
https://review.coreboot.org/c/coreboot/+/33387/27/src/mainboard/emulation/qe... PS27, Line 49: 1
Instead of the function, I used new probe_ramsize() and probe_mb() defined at src/lib/ramdetect. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/debug.S:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 11: * Just debugging. I will remove it later.
Sorry, this is already unused. I removed it.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 10: device i2c 6 on end # Fake component for testing
Thank you for your comment. Is it enough to pass FDT for ARM to setup device configurations? […]
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 8: chip drivers/generic/generic # I2C0 controller
When I deleted this file or made this file empty, I got the error: […]
Done
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/exception.c:
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... PS33, Line 19: return EXC_RET_IGNORED;
When you want it to skip the exception, it needs to return EXC_RET_HANDLED. […]
Sorry, I'm still not sure what EXC_RET_HANDLED and EXC_RET_IGNORED are doing.
Is my understanding correct? 1. Define 2 global functions for returning EXC_RET_HANDLED/EXC_RET_IGNORED. 2. At the beginning of the probe_ramsize(), set the exception handler with EXC_RET_HANDLED. 3. At the end of the probe_ramsize(), set the exception handler with EXC_RET_IGNORED because we don't want to skip an exception anymore.
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 36: #define VIRT_DRAM_START 0x40000000
I moved FLASH_BASE and DRAM_BASE to memlayout.ld and other definitions remain in this file.
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 32: 0x4c000000
Can you #define the constants
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 54: discovered
s/discovered/ram_size_mb/
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 62: 0x60000000
#define the constant
Done
https://review.coreboot.org/c/coreboot/+/33387/11/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/11/src/mainboard/emulation/qe... PS11, Line 31: 4
I'm still working on this file so I will do it later. Thank you for your advice.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 1: /*
I wasn't aware of that, thanks.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 22: if (!dev) {
OK. I removed the if-statement.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 28: ram_resource(dev, 0, VIRT_DRAM_START >> 10, discovered << 10);
Thank you for the reference. I updated this file but I'm not sure it's perfect. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 29: cbmem_recovery(0);
Sorry, I copied this file from mainboard/emulation/qemu-armv7/. I removed this line.
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mainboard.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 18: #define VIRT_DRAM_BASE 0x40000000
You shouldn't need this, it's already in memlayout
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 20: static void mainboard_read_resources(struct device *dev)
looks good
Done
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/6/src/mainboard/emulation/qem... PS6, Line 47: VIRT_FLASH_START
Does the placing BOOTBLOCK in DRAM mean it doesn't use Cache-As-RAM? […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 17: DRAM_START(VIRT_DRAM_START)
OK, thank you for your advice. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 19: 0x10000
This is an arbitrary number as long as a region doesn't overlap. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 24: 0x01040000
This is the number just after the end of RAMSTAGE. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/16/src/mainboard/emulation/qe... PS16, Line 28: VIRT_DRAM_BASE + FIT_SPACE + GT_128KiB
Thank you for the references. I defined addresses in a simpler way.
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 37: * 0x6111_0000..: TTB
I removed lines from "0x0000_0000..0x0080_0000: Flash memory" to "0x6111_0000..: TTB".
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 43: DRAM_START(VIRT_DRAM_BASE)
OK. I put on the number instead of using #define.
Done
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/timer.c:
https://review.coreboot.org/c/coreboot/+/33387/15/src/mainboard/emulation/qe... PS15, Line 9: void udelay(unsigned int n);
Oh yeah, you are right. CNTFRQ is already set by qemu.
Done
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 34:
(6 comments)
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... File Documentation/mainboard/emulation/qemu-aarch64.md:
https://review.coreboot.org/c/coreboot/+/33387/26/Documentation/mainboard/em... PS26, Line 19: reserved for a FIT image
Thank you!
Done
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c File src/lib/fit_payload.c:
https://review.coreboot.org/c/coreboot/+/33387/22/src/lib/fit_payload.c@249 PS22, Line 249: if (config->ramdisk && initrd.size > 0) {
OK. I reverted this change in the CL and created new CL (https://review.coreboot. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 8: chip mainboard/emulation/qemu-aarch64
I removed the mainboard part. It doesn't affect any output messages at all so probably you're right. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/26/src/mainboard/emulation/qe... PS26, Line 9: chip drivers/generic/generic # I2C0 controller
Okay, fair enough, this could probably be fixed in sconfig but let's leave this here for now.
Done
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/memlayout.ld:
https://review.coreboot.org/c/coreboot/+/33387/21/src/mainboard/emulation/qe... PS21, Line 26: BOOTBLOCK(0x60010000, 64K)
OK. […]
Done
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/mmio.c:
https://review.coreboot.org/c/coreboot/+/33387/18/src/mainboard/emulation/qe... PS18, Line 14: // TODO: Return VIRT_SECURE_UART_BASE when QEMU works on a secure mode.
Yes, unless you actually know something that needs to be done here in the future, you should probabl […]
Done
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#35).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/include/mainboard/exception.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 15 files changed, 330 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/35
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 35: Code-Review+2
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 35: Code-Review-1
(2 comments)
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/exception.c:
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... PS33, Line 19: return EXC_RET_IGNORED;
Sorry, I'm still not sure what EXC_RET_HANDLED and EXC_RET_IGNORED are doing. […]
No, you should only have one exception handler. You cannot remove exception handlers, so you need to change the behavior of the one you have. So something like this:
static enum { ABORT_CHECKER_NOT_REGISTERED, ABORT_CHECKER_DEACTIVATED, ABORT_CHECKER_NOT_TRIGGERED, ABORT_CHECKER_TRIGGERED, } abort_state = ABORT_CHECKER_NOT_REGISTERED;
static int abort_checker(struct exc_state *state, uint64_t vector_id) { if (abort_state == ABORT_CHECKER_DEACTIVATED) return EXC_RET_IGNORED;
if (raw_read_esr_el3() >> 26 != 0x25) return EXC_RET_IGNORED; /* not a data abort */
abort_state = ABORT_CHECKER_TRIGGERED; state->elx.elr += sizeof(uint32_t); /* jump over faulting instruction */ raw_write_elr_el3(state->elx.elr); return EXC_RET_HANDLED; }
static int probe_mb(...) { [...]
if (ENV_ARM64) { read32((void *)addr); return abort_state == ABORT_CHECKER_NOT_TRIGGERED; }
[...] }
static int probe_ramsize(void) { if (ENV_ARM64) { if (abort_state == ABORT_CHECKER_NOT_REGISTERED) exception_handler_register(EXC_VID_CUR_SP_EL0_SERR); abort_state = ABORT_CHECKER_NOT_TRIGGERED; }
[...]
if (ENV_ARM64) abort_state = ABORT_CHECKER_DEACTIVATED; }
https://review.coreboot.org/c/coreboot/+/33387/35/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/exception.h:
https://review.coreboot.org/c/coreboot/+/33387/35/src/mainboard/emulation/qe... PS35, Line 1: /* If you're leaving the exception stuff for another patch then please remove this file.
Hello Julius Werner, Patrick Rudolph, build bot (Jenkins), Raul Rangel, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/33387
to look at the new patch set (#36).
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 318 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33387/36
Asami Doi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 36:
(2 comments)
I created a new CL to deal with the exception issue. I updated ramdetect.c to register an exception handler and modified existing code to comply with the clang-format rules. Let's move on to the CL to discuss exception issues. https://review.coreboot.org/c/coreboot/+/34774
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/exception.c:
https://review.coreboot.org/c/coreboot/+/33387/33/src/mainboard/emulation/qe... PS33, Line 19: return EXC_RET_IGNORED;
No, you should only have one exception handler. […]
Thank you for your code. I now understand how I can deal with an exception handler.
I don't change ramdetect.c in this CL, so created a new patch. https://review.coreboot.org/c/coreboot/+/34774
https://review.coreboot.org/c/coreboot/+/33387/35/src/mainboard/emulation/qe... File src/mainboard/emulation/qemu-aarch64/include/mainboard/exception.h:
https://review.coreboot.org/c/coreboot/+/33387/35/src/mainboard/emulation/qe... PS35, Line 1: /*
If you're leaving the exception stuff for another patch then please remove this file.
This is the file I forgot to delete. Thank you for pointing out!
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 36: Code-Review+2
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
Patch Set 36: Code-Review+2
Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33387 )
Change subject: mainboard/emulation/qemu-aarch64: Add new board for ARMv8 ......................................................................
mainboard/emulation/qemu-aarch64: Add new board for ARMv8
This CL adds a new board, QEMU/AArch64, for ARMv8. The machine supported is virt which is a QEMU 2.8 ARM virtual machine. The default CPU of qemu-system-aarch64 is Cortex-a15, so you need to specify a 64-bit cpu via a flag.
To execute: $ qemu-system-aarch64 -M virt,secure=on,virtualization=on \ -cpu cortex-a53 -bios build/coreboot.rom -m 8192M -nographic
Change-Id: Id7c0831b1ecf08785b4ec8139d809bad9b3e1eec Signed-off-by: Asami Doi d0iasm.pub@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33387 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org Reviewed-by: Julius Werner jwerner@chromium.org --- A Documentation/mainboard/emulation/qemu-aarch64.md M Documentation/mainboard/index.md A src/mainboard/emulation/qemu-aarch64/Kconfig A src/mainboard/emulation/qemu-aarch64/Kconfig.name A src/mainboard/emulation/qemu-aarch64/Makefile.inc A src/mainboard/emulation/qemu-aarch64/board_info.txt A src/mainboard/emulation/qemu-aarch64/bootblock_custom.S A src/mainboard/emulation/qemu-aarch64/cbmem.c A src/mainboard/emulation/qemu-aarch64/devicetree.cb A src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h A src/mainboard/emulation/qemu-aarch64/mainboard.c A src/mainboard/emulation/qemu-aarch64/media.c A src/mainboard/emulation/qemu-aarch64/memlayout.ld A src/mainboard/emulation/qemu-aarch64/mmio.c 14 files changed, 318 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Raul Rangel: Looks good to me, approved
diff --git a/Documentation/mainboard/emulation/qemu-aarch64.md b/Documentation/mainboard/emulation/qemu-aarch64.md new file mode 100644 index 0000000..ee4c9e7 --- /dev/null +++ b/Documentation/mainboard/emulation/qemu-aarch64.md @@ -0,0 +1,47 @@ +# QEMU AArch64 emulator +This page discribes how to build and run coreboot for QEMU/AArch64. +You can use LinuxBoot via `make menuconfig` or an arbitrary FIT image +as a payload for QEMU/AArch64. + +## Running coreboot in QEMU +```bash +qemu-system-aarch64 -bios ./build/coreboot.rom \ + -M virt,secure=on,virtualization=on -cpu cortex-a53 \ + -nographic -m 8912M +``` + +- The default CPU in QEMU for AArch64 is a cortex-a15 which is 32-bit +ARM CPU. You need to specify 64-bit ARM CPU via `-cpu cortex-a53`. +- The default privilege level in QEMU for AArch64 is EL1 that we can't +have the right to access EL3/EL2 registers. You need to enable EL3/EL2 +via `-machine secure=on,virtualization=on`. +- You need to specify the size of memory more than 544 MiB because 512 +MiB is reserved for the kernel. + +## Building coreboot with an arbitrary FIT payload +There are 3 steps to make coreboot.rom for QEMU/AArch64. If you select +LinuxBoot, step 2 and 3 have done by LinuxBoot. +1. Get a DTB (Device Tree Blob) +2. Build a FIT image with a DTB +3. Add a FIT image to coreboot.rom + +### 1. Get a DTB +You can get the DTB from QEMU with the following command. +``` +$ qemu-system-aarch64 \ + -M virt,dumpdtb=virt.dtb,secure=on,virtualization=on \ + -cpu cortex-a53 -nographic -m 2048M +``` + +### 2. Build a FIT image with a DTB +You need to write an image source file that has an `.its` extension to +configure kernels, ramdisks, and DTBs. +See [Flattened uImage Tree documentation](../../lib/payloads/fit.md) for more details. + +### 3. Add a FIT image to coreboot.rom +You can use cbfstool to add the payload you created in step 2 to +the coreboot.rom. +``` +$ ./build/cbfstool ./build/coreboot.rom add -f <path-to-a-payload>/uImage \ + -n fallback/payload -t fit -c lzma +``` diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index 8c3f6ea..0f3105f 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -24,6 +24,7 @@
- [Spike RISC-V emulator](emulation/spike-riscv.md) - [Qemu RISC-V emulator](emulation/qemu-riscv.md) +- [Qemu AArch64 emulator](emulation/qemu-aarch64.md)
## Intel
diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig b/src/mainboard/emulation/qemu-aarch64/Kconfig new file mode 100644 index 0000000..7d8d7b2 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig @@ -0,0 +1,51 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# Emulation for QEMU 2.8 ARM Virtual Machine (alias of virt-2.8) +# https://wiki.qemu.org/Documentation/Platforms/ARM + +if BOARD_EMULATION_QEMU_AARCH64 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select ARCH_BOOTBLOCK_ARMV8_64 + select ARCH_VERSTAGE_ARMV8_64 + select ARCH_ROMSTAGE_ARMV8_64 + select ARCH_RAMSTAGE_ARMV8_64 + select ARM64_USE_ARCH_TIMER + select BOARD_ROMSIZE_KB_4096 + select BOOTBLOCK_CONSOLE + select BOOTBLOCK_CUSTOM + select BOOT_DEVICE_NOT_SPI_FLASH + select CONSOLE_SERIAL + select DRIVERS_UART_PL011 + select HAVE_LINEAR_FRAMEBUFFER + select MAINBOARD_FORCE_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT + select MISSING_BOARD_RESET + +config MAINBOARD_DIR + string + default emulation/qemu-aarch64 + +config MAINBOARD_PART_NUMBER + string + default "QEMU AArch64" + +config MAX_CPUS + int + default 2 + +config MAINBOARD_VENDOR + string + default "QEMU" + +config DRAM_SIZE_MB + int + default 1024 + +endif # BOARD_EMULATION_QEMU_AARCH64 diff --git a/src/mainboard/emulation/qemu-aarch64/Kconfig.name b/src/mainboard/emulation/qemu-aarch64/Kconfig.name new file mode 100644 index 0000000..8c14fc1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Kconfig.name @@ -0,0 +1,5 @@ +config BOARD_EMULATION_QEMU_AARCH64 + bool "QEMU AArch64 (virt)" + help + To execute, do: + qemu-system-aarch64 -bios ./build/coreboot.rom -M virt,secure=on,virtualization=on -cpu cortex-a53 -nographic -m 8192M diff --git a/src/mainboard/emulation/qemu-aarch64/Makefile.inc b/src/mainboard/emulation/qemu-aarch64/Makefile.inc new file mode 100644 index 0000000..38ecdd1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/Makefile.inc @@ -0,0 +1,25 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com +# +# SPDX-License-Identifier: GPL-2.0-or-later + +romstage-y += cbmem.c +ramstage-y += cbmem.c + +bootblock-y += media.c +romstage-y += media.c +ramstage-y += media.c + +bootblock-y += mmio.c +romstage-y += mmio.c +ramstage-y += mmio.c + +bootblock-y += memlayout.ld +romstage-y += memlayout.ld +ramstage-y += memlayout.ld + +bootblock-y += bootblock_custom.S + +CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include diff --git a/src/mainboard/emulation/qemu-aarch64/board_info.txt b/src/mainboard/emulation/qemu-aarch64/board_info.txt new file mode 100644 index 0000000..92fafa5 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/board_info.txt @@ -0,0 +1,3 @@ +Board name: QEMU AArch64 (virt) +Category: emulation +Board URL: http://wiki.qemu.org/Main_Page diff --git a/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S b/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S new file mode 100644 index 0000000..f9e85d0 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/bootblock_custom.S @@ -0,0 +1,36 @@ +/* + * Early initialization code for aarch64 (a.k.a. armv8) + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <arch/asm.h> + +ENTRY(_start) + /* Setup CPU. */ + bl arm64_init_cpu + + /* Get code positions. */ + ldr x1, =_flash + ldr x0, =_bootblock + + /* Calculate bootblock size. */ + ldr x2, =_ebootblock + sub x2, x2, x0 + + /* Call memcpy in arch/arm64/memcpy.S */ + bl memcpy + dmb sy + + /* Calculate relocation offset between bootblock in flash and in DRAM. */ + ldr x0, =_flash + ldr x1, =_bootblock + sub x1, x1, x0 + + /* Jump to main() in DRAM. */ + adr x0, main + add x0, x0, x1 + blr x0 +ENDPROC(_start) diff --git a/src/mainboard/emulation/qemu-aarch64/cbmem.c b/src/mainboard/emulation/qemu-aarch64/cbmem.c new file mode 100644 index 0000000..c50254d --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/cbmem.c @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <cbmem.h> +#include <ramdetect.h> +#include <symbols.h> + +void *cbmem_top(void) +{ + return _dram + (probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB) * MiB); +} diff --git a/src/mainboard/emulation/qemu-aarch64/devicetree.cb b/src/mainboard/emulation/qemu-aarch64/devicetree.cb new file mode 100644 index 0000000..010cae8 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/devicetree.cb @@ -0,0 +1,11 @@ +# +# This file is part of the coreboot project. +# +# Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. +# +# SPDX-License-Identifier: GPL-2.0-or-later + +# This file exists only to avoid a compile error. It needs a devicetree.cb that is not empty. +chip drivers/generic/generic # I2C0 controller + device i2c 6 on end # Fake component for testing +end diff --git a/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h new file mode 100644 index 0000000..6f0c802 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/include/mainboard/addressmap.h @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device. + * 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O. + * 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support. + * 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings + * + * 0x0000_0000..0x0080_0000: Flash memory + * 0x0900_0000..0x0900_1000: UART (PL011) + * 0x0901_0000..0x0901_1000: RTC (PL031) + * 0x0903_0000..0x0903_1000: GPIO (PL061) + * 0x0904_0000..0x0904_1000: Secure UART (PL011) + * 0x0905_0000..0x0907_0000: SMMU (smmu-v3) + * 0x0a00_0000..0x0a00_0200: MMIO (virtio) + * 0x0c00_0000..0x0e00_0000: Platform bus + * 0x4000_0000..: RAM + */ +#define VIRT_UART_BASE 0x09000000 +#define VIRT_RTC_BASE 0x09010000 +#define VIRT_GPIO_BASE 0x09030000 +#define VIRT_SECURE_UART_BASE 0x09040000 +#define VIRT_SMMU_BASE 0x09050000 +#define VIRT_MMIO_BASE 0x0a000000 +#define VIRT_PLATFORM_BUS_BASE 0x0c000000 diff --git a/src/mainboard/emulation/qemu-aarch64/mainboard.c b/src/mainboard/emulation/qemu-aarch64/mainboard.c new file mode 100644 index 0000000..5735455 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mainboard.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <cbmem.h> +#include <ramdetect.h> +#include <symbols.h> +#include <device/device.h> + +static void mainboard_enable(struct device *dev) +{ + int ram_size_mb = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB); + ram_resource(dev, 0, (uintptr_t)_dram / KiB, ram_size_mb * KiB); +} + +struct chip_operations mainboard_ops = { + .name = "qemu_aarch64", + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/emulation/qemu-aarch64/media.c b/src/mainboard/emulation/qemu-aarch64/media.c new file mode 100644 index 0000000..03f0eb1 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/media.c @@ -0,0 +1,18 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <boot_device.h> + +/* Maps directly to NOR flash up to ROM size. */ +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_RO_INIT((void *)0x0, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/mainboard/emulation/qemu-aarch64/memlayout.ld b/src/mainboard/emulation/qemu-aarch64/memlayout.ld new file mode 100644 index 0000000..0b52d31 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/memlayout.ld @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Asami Doi d0iasm.pub@gmail.com + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <memlayout.h> +#include <arch/header.ld> + +/* + * Memory map for QEMU virt machine since + * a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019): + * + * 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device. + * 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O. + * 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support. + * 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings. + */ +SECTIONS +{ + REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8) + + DRAM_START(0x40000000) + BOOTBLOCK(0x60010000, 64K) + STACK(0x60020000, 64K) + ROMSTAGE(0x60030000, 128K) + RAMSTAGE(0x60070000, 16M) + + TTB(0x61100000, 16K) + POSTRAM_CBFS_CACHE(0x61110000, 1M) +} diff --git a/src/mainboard/emulation/qemu-aarch64/mmio.c b/src/mainboard/emulation/qemu-aarch64/mmio.c new file mode 100644 index 0000000..717d858 --- /dev/null +++ b/src/mainboard/emulation/qemu-aarch64/mmio.c @@ -0,0 +1,15 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2019 Asami Doi d0iasm.pub@gmail.com. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <console/uart.h> +#include <mainboard/addressmap.h> + +uintptr_t uart_platform_base(int idx) +{ + return VIRT_UART_BASE; +}
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