Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35523 )
Change subject: mb/acer: Add Acer Aspire VN7-572G
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Patch Set 105:
(1 comment)
https://review.coreboot.org/c/coreboot/+/35523/105//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/35523/105//COMMIT_MSG@28
PS105, Line 28: dGPU
As FSP does display configuration (iGFX, Switchable Graphics, etc) in FSP-M and UEFI configures the relevant GPIOs in PEI (see SwitchableGraphicsPei.c), I attempted to move the `gpu_reset` function into romstage.
It didn't work, but dmesg was displaying errors about being unable to transition the root port from D3 to D0, because the config space was unavailable.
An alternative is PrimaryDisplay=Display_SG and setting the Switchable Graphics GPIO UPDs.
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