[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp: Select CPU_INTEL_COMMON

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45041 )

Change subject: soc/intel/xeon_sp: Select CPU_INTEL_COMMON
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Patch Set 1:
> Patch Set 1:
>
> Hi Angel, did you try this on DeltaLake EVT server?
>
> Rocky, CPU_INTEL_COMMON_SMM is selected once CPU_INTEL_COMMON is selected.

I forgot to add it to the commit message, but both Tioga Pass and Delta Lake remain unchanged when building with BUILD_TIMELESS=1. Without adding the config into the coreboot.rom, the resulting timeless coreboot.rom before and after applying this commit are identical.