Patch Set 1:

Hi Angel, did you try this on DeltaLake EVT server?

Rocky, CPU_INTEL_COMMON_SMM is selected once CPU_INTEL_COMMON is selected.

I forgot to add it to the commit message, but both Tioga Pass and Delta Lake remain unchanged when building with BUILD_TIMELESS=1. Without adding the config into the coreboot.rom, the resulting timeless coreboot.rom before and after applying this commit are identical.

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I565e75869be730e7c2fe7114b829941bc9890e6c
Gerrit-Change-Number: 45041
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam@intel.com>
Gerrit-Reviewer: Jonathan Zhang <jonzhang@fb.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Rocky Phagura
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