coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

1 participants
3140 discussions

[XS] Change in coreboot[main]: mb/starlabs/starbook/tgl: Move PROCHOT GPIO to PCH group
by Sean Rhodes (Code Review) 06 Apr '25

06 Apr '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87168?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starbook/tgl: Move PROCHOT GPIO to PCH group ...................................................................... mb/starlabs/starbook/tgl: Move PROCHOT GPIO to PCH group Change-Id: I3fb4421698df9ca3e9a6067d9054ef10ec103f25 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87168 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/tgl/gpio.c 1 file changed, 1 insertion(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c index 28b3388..07b455f 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c @@ -68,6 +68,7 @@ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* Platform Reset */ PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), /* Vendor ID 0 */ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* Vendor ID 1 */ + PAD_NC(GPP_B2, NONE), /* Processor Hot */ /* TPM */ PAD_CFG_GPI_APIC_LOW(GPP_C14, NONE, PLTRST), /* Interrupt */ @@ -119,8 +120,6 @@ /* A22: Not Connected */ PAD_NC(GPP_A22, NONE), - /* B2: VRALERT_N */ - PAD_NC(GPP_B2, NONE), /* B3: Not Connected */ PAD_NC(GPP_B3, NONE), /* B4: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87168?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3fb4421698df9ca3e9a6067d9054ef10ec103f25 Gerrit-Change-Number: 87168 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[S] Change in coreboot[main]: mb/starlabs/starbook/tgl: Tidy GPIO comments for the retimers
by Sean Rhodes (Code Review) 06 Apr '25

06 Apr '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87167?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starbook/tgl: Tidy GPIO comments for the retimers ...................................................................... mb/starlabs/starbook/tgl: Tidy GPIO comments for the retimers This is a non-functional change, and only makes the GPIOs easier to read. Change-Id: I237824415c99bf57e9617a37001383cdda4a38e6 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87167 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/tgl/gpio.c 1 file changed, 5 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c index 8705b13..28b3388 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c @@ -51,6 +51,11 @@ PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1), /* SML Clock */ PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1), /* SML Data */ + /* Retimer */ + PAD_NC(GPP_E18, NATIVE), /* TBT0 TXD */ + PAD_NC(GPP_E19, NATIVE), /* TBT0 RXD */ + PAD_CFG_GPO(GPP_A23, 0, DEEP), /* Force Power */ + /* High-Definition Audio */ PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */ PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */ @@ -113,8 +118,6 @@ PAD_NC(GPP_A21, NONE), /* A22: Not Connected */ PAD_NC(GPP_A22, NONE), - /* A23: TC_RETIMER_FORCE_PWR */ - PAD_CFG_GPO(GPP_A23, 0, DEEP), /* B2: VRALERT_N */ PAD_NC(GPP_B2, NONE), @@ -257,10 +260,6 @@ PAD_NC(GPP_E16, NONE), /* E17: Not Connected */ PAD_NC(GPP_E17, NONE), - /* E18: TBT_LSX0_TXD */ - PAD_NC(GPP_E18, NATIVE), - /* E19: TBT_LSX0_RXD */ - PAD_NC(GPP_E19, NATIVE), /* E20: Not Connected */ PAD_NC(GPP_E20, NONE), /* E21: TBT_LSX1_RXD */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87167?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I237824415c99bf57e9617a37001383cdda4a38e6 Gerrit-Change-Number: 87167 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[S] Change in coreboot[main]: mb/starlabs/starbook/mtl: Uncomment eSPI GPIOs
by Sean Rhodes (Code Review) 06 Apr '25

06 Apr '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87178?usp=email ) Change subject: mb/starlabs/starbook/mtl: Uncomment eSPI GPIOs ...................................................................... mb/starlabs/starbook/mtl: Uncomment eSPI GPIOs These, unlike almost all other Intel platforms, are not configured automatically on reset, so coreboot needs to handle it. Change-Id: Ie013ce1769e61fae1622a9cc1a048229fd9d6944 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87178 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/mtl/gpio.c 1 file changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c index c8ca838..bb976a8 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c @@ -30,13 +30,13 @@ PAD_CFG_NF(GPP_V08, NONE, DEEP, NF1), /* Bluetooth Suspend */ /* eSPI */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A00, UP_20K, DEEP, NF1), /* eSPI IO 0 */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A01, UP_20K, DEEP, NF1), /* eSPI IO 1 */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A02, UP_20K, DEEP, NF1), /* eSPI IO 2 */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A03, UP_20K, DEEP, NF1), /* eSPI IO 3 */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A04, UP_20K, DEEP, NF1), /* eSPI CS 0 */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A05, UP_20K, DEEP, NF1), /* eSPI Clk */ - // PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A06, NONE, DEEP, NF1), /* eSPI Reset */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A00, UP_20K, DEEP, NF1), /* eSPI IO 0 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A01, UP_20K, DEEP, NF1), /* eSPI IO 1 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A02, UP_20K, DEEP, NF1), /* eSPI IO 2 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A03, UP_20K, DEEP, NF1), /* eSPI IO 3 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A04, UP_20K, DEEP, NF1), /* eSPI CS 0 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A05, UP_20K, DEEP, NF1), /* eSPI Clk */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_A06, NONE, DEEP, NF1), /* eSPI Reset */ /* Touchpad */ PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* Data */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87178?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie013ce1769e61fae1622a9cc1a048229fd9d6944 Gerrit-Change-Number: 87178 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[XS] Change in coreboot[main]: mb/starlabs/starbook/tgl: Remove SSD GPIO quirk
by Sean Rhodes (Code Review) 06 Apr '25

06 Apr '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87166?usp=email ) Change subject: mb/starlabs/starbook/tgl: Remove SSD GPIO quirk ...................................................................... mb/starlabs/starbook/tgl: Remove SSD GPIO quirk This quirk was added to turn of the SSD in S3. This is now handled by the RTD3 driver, so it can be removed. Change-Id: Iaf6364a0957f95411c11e31c8317e1c4ec5c769f Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87166 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/acpi/sleep.asl 1 file changed, 0 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/acpi/sleep.asl b/src/mainboard/starlabs/starbook/acpi/sleep.asl index 78a2d29..7ed74e3 100644 --- a/src/mainboard/starlabs/starbook/acpi/sleep.asl +++ b/src/mainboard/starlabs/starbook/acpi/sleep.asl @@ -2,12 +2,6 @@ Method (MPTS, 1, NotSerialized) { -#if CONFIG(BOARD_STARLABS_STARBOOK_TGL) - If (Arg0 == 0x03) { - \_SB.PCI0.CTXS (GPP_D16) - } -#endif - RPTS (Arg0) } -- To view, visit https://review.coreboot.org/c/coreboot/+/87166?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf6364a0957f95411c11e31c8317e1c4ec5c769f Gerrit-Change-Number: 87166 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Change SSD enable GPIO to DEEP
by Sean Rhodes (Code Review) 06 Apr '25

06 Apr '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87153?usp=email ) Change subject: mb/starlabs/starbook/mtl: Change SSD enable GPIO to DEEP ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/87153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6cc247e04974d293dfc157a3b459a3fb61e43a7f Gerrit-Change-Number: 87153 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Sun, 06 Apr 2025 18:30:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

1 0

[S] Change in coreboot[main]: Documentation/getting_started/cbmem.md: Add cbmem documentation
by Martin L Roth (Code Review) 06 Apr '25

06 Apr '25

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84761?usp=email ) Change subject: Documentation/getting_started/cbmem.md: Add cbmem documentation ...................................................................... Documentation/getting_started/cbmem.md: Add cbmem documentation Change-Id: I514cfbd6df85f332419444c35d066a518d5044f3 Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84761 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Reviewed-by: Martin L Roth <gaumless(a)gmail.com> --- A Documentation/getting_started/cbmem.md M Documentation/getting_started/index.md 2 files changed, 42 insertions(+), 0 deletions(-) Approvals: Ana Carolina Cabral: Looks good to me, but someone else must approve build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/Documentation/getting_started/cbmem.md b/Documentation/getting_started/cbmem.md new file mode 100644 index 0000000..13e6cf8 --- /dev/null +++ b/Documentation/getting_started/cbmem.md @@ -0,0 +1,41 @@ +# CBMEM high table memory manager + +## Introduction +CBMEM (coreboot memory) is a dynamic memory infrastructure used in +coreboot to store runtime data structures, logs, and other information +that needs to persist across different boot stages. CBMEM is crucial +for maintaining state and logging information across different stages +of the coreboot boot process. + +## Creation and Placement +CBMEM is initialized by coreboot during romstage, but is used mainly in +ramstage for storing data such as coreboot and ACPI tables, SMBIOS, +timestamps, stage information, vendor-specific data structures, etc. + +For 32-bit builds, CBMEM is typically located at the highest usable +DRAM address below the 4GiB boundary. For 64-bit builds, while there +is no strict upper limit, it is advisable to follow the same guidelines +to prevent access or addressing issues. Regardless of the build type, +the CBMEM address must remain consistent between romstage and ramstage. + +Each platform may need to implement its own method for determining the +`cbmem_top` address, as this can depend on specific hardware +configurations and memory layouts. + +## Usage +Each CBMEM region is identified by a unique ID, allowing different +components to store and retrieve their data during runtime. The ID is a +32-bit value that optionally encodes characters to indicate the type or +source of the data. + +Upon creating an entry, a block of memory is allocated of the requested +size from the reserved CBMEM region. This region persists across warm +reboots, making it useful for debugging and passing information to +payloads. + +Note that CBMEM is implemented as imd (in-memory database), meaning +it grows downwards in memory from the provided upper limit, and only +the latest added entry may be removed. + +The `cbmem` tool in `/util` can be used to list and access entries +using their ID. diff --git a/Documentation/getting_started/index.md b/Documentation/getting_started/index.md index 7180c96..8b2ce3a 100644 --- a/Documentation/getting_started/index.md +++ b/Documentation/getting_started/index.md @@ -10,5 +10,6 @@ Writing Documentation <writing_documentation.md> Setting up GPIOs <gpio.md> Adding devices to a device tree <devicetree.md> +CBMEM <cbmem.md> Frequently Asked Questions <faq.md> ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/84761?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I514cfbd6df85f332419444c35d066a518d5044f3 Gerrit-Change-Number: 84761 Gerrit-PatchSet: 3 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com>

1 0

[S] Change in coreboot[main]: Documentation/getting_started/cbmem.md: Add cbmem documentation
by Martin L Roth (Code Review) 06 Apr '25

06 Apr '25

Attention is currently required from: Martin Roth, Nicholas Chin, Nick Kochlowski. Martin L Roth has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/84761?usp=email ) Change subject: Documentation/getting_started/cbmem.md: Add cbmem documentation ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84761?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I514cfbd6df85f332419444c35d066a518d5044f3 Gerrit-Change-Number: 84761 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sun, 06 Apr 2025 15:43:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[L] Change in coreboot[main]: Documentation: Add information about the site-local directory
by Martin L Roth (Code Review) 06 Apr '25

06 Apr '25

Attention is currently required from: Nicholas Chin. Martin L Roth has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/87185?usp=email ) Change subject: Documentation: Add information about the site-local directory ...................................................................... Patch Set 1: (1 comment) File Documentation/getting_started/site-local.md: PS1: > There is already `tutorial/managing_local_additions. […] Okay,but this isn't a tutorial,and it covers the entirety of using site local, so it's different. I see a few options: - Leave both as they are. - Don't document the rest of site-local since a piece is covered in the tutorial. - Remove the duplicate coverage from one place or the other. - Remove the tutorial. To me, the only one of these that really makes sense is to cover them in both places. A tutorial is a completely different sort of document, so it seems reasonable to have information duplicated there. Thoughts? -- To view, visit https://review.coreboot.org/c/coreboot/+/87185?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida176aa460be7673bad219f958f741dd68a8aa62 Gerrit-Change-Number: 87185 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sun, 06 Apr 2025 15:42:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

1 0

[S] Change in coreboot[main]: Documentation: Add a statement about committer responsibilities
by Martin L Roth (Code Review) 06 Apr '25

06 Apr '25

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85898?usp=email ) Change subject: Documentation: Add a statement about committer responsibilities ...................................................................... Documentation: Add a statement about committer responsibilities This statement clarifies committer responsibilities, including using generative AI. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Ibfc92fc76149f96bd8e65befce99f3a2ddc3d847 Reviewed-on: https://review.coreboot.org/c/coreboot/+/85898 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M Documentation/contributing/index.md 1 file changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/Documentation/contributing/index.md b/Documentation/contributing/index.md index 1f9e9e5..a230f96 100644 --- a/Documentation/contributing/index.md +++ b/Documentation/contributing/index.md @@ -10,3 +10,20 @@ Documentation Ideas <documentation_ideas.md> Google Summer of Code <gsoc.md> ``` + +The coreboot project uses the Developer Certificate of Origin as its +policy of accepting contributions. As such, a submitter bears the burden +that they have all necessary rights to submit their contribution to the +project under the project's licenses as appropriate. Violations of third +party rights will lead to the code's removal or replacement as suitable +to bring the project back into compliance. + +This applies no matter under which circumstances a contribution has been +created: legal frameworks, work contracts, Generative Artificial +Intelligence ("AI") tooling, or other aspects that may affect the +ownership and copyright status of a contribution are outside the +project's control. + +See the [Sign-off procedure] for more information. + +[Sign-off procedure]: gerrit_guidelines.md#sign-off-procedure -- To view, visit https://review.coreboot.org/c/coreboot/+/85898?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibfc92fc76149f96bd8e65befce99f3a2ddc3d847 Gerrit-Change-Number: 85898 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com>

1 0

[S] Change in coreboot[main]: mb/hp/snb_ivb_desktops/cmos.layout: Add full gfx_uma_size range
by Keith Hui (Code Review) 06 Apr '25

06 Apr '25

Keith Hui has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/87192?usp=email ) Change subject: mb/hp/snb_ivb_desktops/cmos.layout: Add full gfx_uma_size range ...................................................................... mb/hp/snb_ivb_desktops/cmos.layout: Add full gfx_uma_size range This board is missing option values for 256MB and up. Make complete by referencing asus/p8x7x-series. BUG=https://ticket.coreboot.org/issues/581 Change-Id: Id89290a673b0e5dbc72c11c097aeb70d410adeab Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/hp/snb_ivb_desktops/cmos.layout 1 file changed, 11 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/87192/1 diff --git a/src/mainboard/hp/snb_ivb_desktops/cmos.layout b/src/mainboard/hp/snb_ivb_desktops/cmos.layout index 1fc83b1..35533bd 100644 --- a/src/mainboard/hp/snb_ivb_desktops/cmos.layout +++ b/src/mainboard/hp/snb_ivb_desktops/cmos.layout @@ -23,7 +23,7 @@ 421 1 e 9 sata_mode # coreboot config options: northbridge -432 3 e 11 gfx_uma_size +432 4 e 11 gfx_uma_size 448 128 r 0 vbnv @@ -67,6 +67,16 @@ 11 4 160M 11 5 192M 11 6 224M +11 7 256M +11 8 288M +11 9 320M +11 10 352M +11 11 384M +11 12 416M +11 13 448M +11 14 480M +11 15 512M +11 16 1024M # ----------------------------------------------------------------- checksums -- To view, visit https://review.coreboot.org/c/coreboot/+/87192?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id89290a673b0e5dbc72c11c097aeb70d410adeab Gerrit-Change-Number: 87192 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit April 2025