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Change subject: util/crossgcc: Build compiler-rt using runtimes
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Patch Set 8: Code-Review+1
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Change subject: util/crossgcc: Upgrade LLVM from version 18.1.8 to 20.1.2
......................................................................
Patch Set 8:
(1 comment)
File util/crossgcc/patches/clang-18.1.8.src_x86_baremetal.patch:
https://review.coreboot.org/c/coreboot/+/85986/comment/2cf82c0b_c60ad1d7?us… :
PS8, Line 1: diff --git a/lib/Driver/ToolChains/BareMetal.cpp b/lib/Driver/ToolChains/BareMetal.cpp
Looking at the 20.1.x source this patch should rather be adapted to apply again instead of being deleted as the isX86BareMetal check is still not upstream, no? It would be rather trivial to rebase this patch as well.
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Change subject: util/cbmem: Extract memory mapping to common functions
......................................................................
util/cbmem: Extract memory mapping to common functions
Extract most of calls to map_memory() to dedicated functions instead
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memcpy.
BUG=b:391874512
TEST=cbmem -l; cbmem -x; cbmem -r 434f4e53; cbmem -t
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......................................................................
util/cbmem: Switch from coreboot table to cbmem
Remove global variables wherever possible to make code easier to read
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Use CBMEM entries instead of coreboot table records.
BUG=b:391874512
TEST=cbmem -l; cbmem -x; cbmem -r 434f4e53; cbmem -t; cbmem -a 1200
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......................................................................
util/cbmem: Extract memory mapping to common functions
Extract most of calls to map_memory() to dedicated functions instead
providing allocated buffer eliminating a need to perform manual aligned
memcpy.
BUG=b:391874512
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Change subject: soc/amd/common/cpu/noncar: Compute core info boost freq & L3 cache
......................................................................
Patch Set 17:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85640/comment/0868a7b5_e64641d6?us… :
PS16, Line 7: Compute core info
> It’d be great if you could be more specific.
Done
https://review.coreboot.org/c/coreboot/+/85640/comment/9681c157_fa7d4096?us… :
PS16, Line 9: In some SoC like Glinda, have
: 1. Different CPU cores have
> *In some … have, … have* is confusing to me. It’d be great if you could rephrase it.
Done
https://review.coreboot.org/c/coreboot/+/85640/comment/68a1b856_1488703d?us… :
PS16, Line 13: function
> function*s*
Done
https://review.coreboot.org/c/coreboot/+/85640/comment/301e560e_cf5098a8?us… :
PS16, Line 19: Retrieves
> Imperative mood: Retrieve […]
Done
https://review.coreboot.org/c/coreboot/+/85640/comment/03d4234f_15bc6d0c?us… :
PS16, Line 26: 24MB
> What was it before?
Done
File src/soc/amd/common/block/include/amdblocks/cpu.h:
https://review.coreboot.org/c/coreboot/+/85640/comment/bdafec04_4150ff30?us… :
PS16, Line 11: struct core_info {
: /* Core max boost frequency */
: uint32_t max_frequency;
:
: /* L3 Cache block unique ID & size (in bytes) */
: uint16_t l3_cache_uid;
: size_t l3_cache_size;
: };
:
> put this into the `cpu.c` file, since its not used outside of that file.
Done
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Change subject: util/cbmem: Extract memory mapping to common functions
......................................................................
Patch Set 6:
(10 comments)
File util/cbmem/cbmem.c:
https://review.coreboot.org/c/coreboot/+/86487/comment/df692c23_e825fe66?us… :
PS3, Line 279: type
> Note that types aren't necessarily exclusive. […]
I am aware of that. That's why this function iterates from the end to account for CBMEM entry being the last one.
This function is ony used by `dump_cbmem_hex()`, so technically it could be integrated into it, but I wanted to have some level of separation, as it helps later patches.
https://review.coreboot.org/c/coreboot/+/86487/comment/84796c25_4a4ca008?us… :
PS3, Line 480: static int lb_table_get_entry(uint32_t tag, uint8_t **buf_out, size_t *size_out)
> This function is doing a lot of duplication. […]
Great suggestion. It also allowed to remove unnecessary return statements. `cbmem` will not behave the same after this change, but I doubt anyone would like to get TPM log and timestamps at the same time as it would be a pain to parse.
https://review.coreboot.org/c/coreboot/+/86487/comment/05a090e7_b36ed75f?us… :
PS3, Line 594: static int lb_table_map_entry_rw(uint32_t id, struct mapping *mapping, uint8_t **buf_out,
> FWIW, you can do that on a later patch if you prefer, but eventually to support the goal of using sy […]
That's the approach I've taken with `sysfs` as we cannot `memmap` entries. However I'd like to leave this as it is for now. This can be solved in later patches where I introduce a better API.
https://review.coreboot.org/c/coreboot/+/86487/comment/4bddc909_68860fe6?us… :
PS3, Line 1456: printf("%c", buf[i]);
> nit: Already in the old code, but wouldn't this be easier as `fwrite(buf, 1, size, stdout)`? Or does […]
I've checked libc implementation and it does not do any coversion for `%c` so we can safely switch to `fwrite()`.
File util/cbmem/cbmem.c:
https://review.coreboot.org/c/coreboot/+/86487/comment/1dc576ff_c2d2931f?us… :
PS5, Line 281: {
> Is memory expected to be initialized always when this function gets called?
We expect `LB_TAG_MEMORY` to always be present, thus `memory` too, but just to be sure I added a check here.
https://review.coreboot.org/c/coreboot/+/86487/comment/adcc5a4b_3c70d434?us… :
PS5, Line 340: const struct lb_memory *mem = lbtable + i;
> This is probably not needed. […]
Done
https://review.coreboot.org/c/coreboot/+/86487/comment/ef78cdd5_274ad77b?us… :
PS5, Line 483: {
> Nit: Is curly braces needed for case block? I see that it is consistent with the rest of the file. […]
Rework suggested by Julius allows easy removal braces. I kept them here to avoid name clashes/shadowing.
https://review.coreboot.org/c/coreboot/+/86487/comment/6e771cdc_cfbcb114?us… :
PS5, Line 597: if (id == LB_TAG_TIMESTAMPS) {
> Nit: […]
Done
https://review.coreboot.org/c/coreboot/+/86487/comment/440d7449_66c1c433?us… :
PS5, Line 893: size = sizeof(*tst_p) + tst_p->num_entries * sizeof(tst_p->entries[0]);
> Isn't tst_buf_size equal to this value when lb_table_get_entry returns? If so, do we need both?
I must have missed it while rearranging the code. Thanks!
https://review.coreboot.org/c/coreboot/+/86487/comment/4b71e139_73bcfe48?us… :
PS5, Line 1195: (void)size;
> If size parameter is unused, can it be removed? It is not used until the last CL in this chain.
Done
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Change subject: util/cbmem: Switch from coreboot table to cbmem
......................................................................
util/cbmem: Switch from coreboot table to cbmem
Remove global variables wherever possible to make code easier to read
and to isolate responsibilities of functions.
Use CBMEM entries instead of coreboot table records.
BUG=b:391874512
TEST=cbmem -l; cbmem -x; cbmem -r 434f4e53; cbmem -t; cbmem -a 1200
Change-Id: Iaa6e38b600c06ba72348250e865a4e8f30a31b8e
Signed-off-by: Jakub Czapiga <czapiga(a)google.com>
---
M util/cbmem/cbmem.c
1 file changed, 149 insertions(+), 211 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/86488/6
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Change subject: util/cbmem: Extract memory mapping to common functions
......................................................................
util/cbmem: Extract memory mapping to common functions
Extract most of calls to map_memory() to dedicated functions instead
providing allocated buffer eliminating a need to perform manual aligned
memcpy.
BUG=b:391874512
TEST=cbmem -l; cbmem -x; cbmem -r 434f4e53; cbmem -t
Change-Id: I70f8790842a932c4cf7717298ef43c8110dfa878
Signed-off-by: Jakub Czapiga <czapiga(a)google.com>
---
M util/cbmem/cbmem.c
1 file changed, 250 insertions(+), 189 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/86487/6
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Avi Uday has posted comments on this change by Avi Uday. ( https://review.coreboot.org/c/coreboot/+/87303?usp=email )
Change subject: MAINTAINERS: Add Avi for intel/pantherlake and google/fatcat
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> we need to add maintainer file for ocelet as well ?
Yes, I will create a separate CL for that
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