coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Enable multiple ACPI devices for GPIO
by Jérémy Compostella (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Jérémy Compostella has uploaded a new patch set (#4) to the change originally created by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/86290?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/pantherlake: Enable multiple ACPI devices for GPIO ...................................................................... soc/intel/pantherlake: Enable multiple ACPI devices for GPIO In the Panther Lake architecture, each GPIO community functions as a separate pin control entity. Therefore, when specifying a GPIO identifier, one should use the community-specific offset, not the number from the first pad within the GPIO series. The numbers within the _CRS GpioInt and GpIo objects in the SSDT should be offsets within the community. The GPIO identifier employed should correspond to the offset from the respective community. Let's take an example. In the fatcat board overridetree.cb, ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19) points to GPIO Group E. The pad starts at 74. It is inside community 1, which starts at 48. The correct GPIO reference is (19 + 74) - 48 = 45, or 0x002D in hexadecimal. Here are two notable changes in the fatcat board SSDT introduced by this commit. - ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19) "\\_SB.PCI0.GPI1", 0x00, ResourceConsumer, , ) { // Pin list - 0x0033 + 0x002D } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data - ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A16) "\\_SB.PCI0.GPI3", 0x00, ResourceConsumer, , ) { // Pin list - 0x0050 + 0x003B } }) Name (_DSD, Package (0x02) // _DSD: Device-Specific Data BUG=none TEST=Check the number from CRS GpinInt and GpIo objects in the SSDT, and ensure that the GPIO number used matches the community offset. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/86290/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 Gerrit-Change-Number: 86290 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Bora Guvendik (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Subrata Banik, Zhixing Ma. Bora Guvendik has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 7 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Thu, 13 Feb 2025 18:25:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Zhixing Ma (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Bora Guvendik, Subrata Banik. Zhixing Ma has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85960/comment/1ccdc2bc_bf8ec156?us… : PS5, Line 16: > > Hi Subrata, […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 7 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Thu, 13 Feb 2025 18:24:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhixing Ma <zhixing.ma(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: mb/amd/birman_plus: Use actual flash size of 64 MiB instead of 16 MiB
by Maximilian Brune (Code Review) 13 Feb '25

13 Feb '25

Maximilian Brune has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86179?usp=email ) Change subject: mb/amd/birman_plus: Use actual flash size of 64 MiB instead of 16 MiB ...................................................................... mb/amd/birman_plus: Use actual flash size of 64 MiB instead of 16 MiB Birman+ has a 64MiB flash chip. Update the mainboards Kconfig comment and fix the FMD to generate a 64MiB ROM. Until now only the first 16MiB are being used. TEST: Still boots on AMD/Birman+ Change-Id: I72e3dcb0c3a308c3b0fd981b56cc7c1ef60095cc Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86179 Reviewed-by: Maximilian Brune <maximilian.brune(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/amd/birman_plus/Kconfig M src/mainboard/amd/birman_plus/board_glinda.fmd 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: Maximilian Brune: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/amd/birman_plus/Kconfig b/src/mainboard/amd/birman_plus/Kconfig index 02f3f23..9794383 100644 --- a/src/mainboard/amd/birman_plus/Kconfig +++ b/src/mainboard/amd/birman_plus/Kconfig @@ -2,7 +2,7 @@ config BOARD_AMD_BIRMANPLUS_COMMON def_bool n - select BOARD_ROMSIZE_KB_16384 # Birman actually has a 32MiB ROM + select BOARD_ROMSIZE_KB_16384 # Birman+ actually has a 64MiB ROM select EC_ACPI select SOC_AMD_COMMON_BLOCK_USE_ESPI if !SOC_AMD_COMMON_BLOCK_SIMNOW_BUILD select DRIVERS_PCIE_RTD3_DEVICE diff --git a/src/mainboard/amd/birman_plus/board_glinda.fmd b/src/mainboard/amd/birman_plus/board_glinda.fmd index 17673b5..b946576 100644 --- a/src/mainboard/amd/birman_plus/board_glinda.fmd +++ b/src/mainboard/amd/birman_plus/board_glinda.fmd @@ -1,5 +1,5 @@ -FLASH@0xFF000000 16M { - BIOS { +FLASH 64M { + BIOS 16M { EC_SIG 4K FMAP 4K COREBOOT(CBFS) -- To view, visit https://review.coreboot.org/c/coreboot/+/86179?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I72e3dcb0c3a308c3b0fd981b56cc7c1ef60095cc Gerrit-Change-Number: 86179 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/amd/birman_plus: Add SMMSTORE to FMAP
by Maximilian Brune (Code Review) 13 Feb '25

13 Feb '25

Maximilian Brune has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86177?usp=email ) Change subject: mb/amd/birman_plus: Add SMMSTORE to FMAP ...................................................................... mb/amd/birman_plus: Add SMMSTORE to FMAP Add the SMMSTORE region to the default FMAP to allow building for EDK2 as payload. TEST: Still boots on AMD/Birman+ Change-Id: I661fcc55bf30aa6f1f3cc8a57e6d0eaf2fed4621 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86177 Reviewed-by: Maximilian Brune <maximilian.brune(a)9elements.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/amd/birman_plus/board_glinda.fmd 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Maximilian Brune: Looks good to me, approved diff --git a/src/mainboard/amd/birman_plus/board_glinda.fmd b/src/mainboard/amd/birman_plus/board_glinda.fmd index 7567090..17673b5 100644 --- a/src/mainboard/amd/birman_plus/board_glinda.fmd +++ b/src/mainboard/amd/birman_plus/board_glinda.fmd @@ -3,6 +3,7 @@ EC_SIG 4K FMAP 4K COREBOOT(CBFS) + SMMSTORE(PRESERVE) 256K EC_BODY@15872K 256K RW_MRC_CACHE 120K } -- To view, visit https://review.coreboot.org/c/coreboot/+/86177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I661fcc55bf30aa6f1f3cc8a57e6d0eaf2fed4621 Gerrit-Change-Number: 86177 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: remove duplicate devicetree entry
by Matt DeVillier (Code Review) 13 Feb '25

13 Feb '25

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86410?usp=email ) Change subject: mb/starlabs/starlite_adl: remove duplicate devicetree entry ...................................................................... mb/starlabs/starlite_adl: remove duplicate devicetree entry `register "cnvi_bt_audio_offload" = "1"` appears twice, remove the duplicate entry. TEST=build/boot starlite_adl, verify BT audio offload still enabled. Change-Id: I3f80a830463842f0ee545e39a6ebaa60f642e920 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/86410/1 diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 16603f3..251b420 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -108,7 +108,6 @@ register "desc" = ""CNVi Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "is_intel_bluetooth" = "1" - register "cnvi_bt_audio_offload" = "1" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_VGPIO_0)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)" register "group" = "ACPI_PLD_GROUP(0, 5)" -- To view, visit https://review.coreboot.org/c/coreboot/+/86410?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3f80a830463842f0ee545e39a6ebaa60f642e920 Gerrit-Change-Number: 86410 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: drivers/tpm: Use fieldlist for dynamic TPPF field creation
by Sean Rhodes (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, Nicholas Sudsgaard, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84606?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: drivers/tpm: Use fieldlist for dynamic TPPF field creation ...................................................................... drivers/tpm: Use fieldlist for dynamic TPPF field creation Define TPPF field dynamically in the PPOP OpRegion, this ensures that the offset stored in Local0 is used correctly. This fixes: CreateByteField (PPOP, Local0, TPPF) Error 6058 - Invalid type ^ ([Region] found, CreateByteField operator requires [Integer|String|Buffer]) Change-Id: If80bb5bf69562f8b904c1b315e95a0b5627efbc4 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/drivers/tpm/ppi.c 1 file changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/84606/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/84606?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If80bb5bf69562f8b904c1b315e95a0b5627efbc4 Gerrit-Change-Number: 84606 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: mb/amd/birman_plus: Update devicetree
by Maximilian Brune (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Alicja Michalska, Ana Carolina Cabral, Felix Held, Matt DeVillier, Paul Menzel. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84500?usp=email ) Change subject: mb/amd/birman_plus: Update devicetree ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > hmm, looks like the linter doesn't know about comments in the devicetree and now complains about a c […] Yeah too bad. I just removed the CONFIG_ prefix now, because I don't want to fight the linter. -- To view, visit https://review.coreboot.org/c/coreboot/+/84500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1cc2e4c8f722048b24d84cf782855ae7a8d64c42 Gerrit-Change-Number: 84500 Gerrit-PatchSet: 6 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 13 Feb 2025 15:37:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in blobs[main]: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.22.0
by Yu-Ping Wu (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86380?usp=email ) Change subject: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.22.0 ...................................................................... Patch Set 3: Code-Review+2 Verified+1 -- To view, visit https://review.coreboot.org/c/blobs/+/86380?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic785a04e576065a250f55a78105abf42b61a15a7 Gerrit-Change-Number: 86380 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 13 Feb 2025 15:18:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/amd/birman_plus: Update devicetree
by Felix Held (Code Review) 13 Feb '25

13 Feb '25

Attention is currently required from: Alicja Michalska, Ana Carolina Cabral, Matt DeVillier, Maximilian Brune, Paul Menzel. Felix Held has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/84500?usp=email ) Change subject: mb/amd/birman_plus: Update devicetree ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: hmm, looks like the linter doesn't know about comments in the devicetree and now complains about a comment -- To view, visit https://review.coreboot.org/c/coreboot/+/84500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1cc2e4c8f722048b24d84cf782855ae7a8d64c42 Gerrit-Change-Number: 84500 Gerrit-PatchSet: 6 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Comment-Date: Thu, 13 Feb 2025 15:12:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit February 2025