coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: vc/intel/fsp/ptl: Update header files from 2454_00 to 3015_00
by Bora Guvendik (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Alok Agarwal, Bora Guvendik, Intel coreboot Reviewers, Jayvik Desai, Ronak Kanabar. Bora Guvendik has uploaded a new patch set (#6) to the change originally created by Alok Agarwal. ( https://review.coreboot.org/c/coreboot/+/86297?usp=email ) Change subject: vc/intel/fsp/ptl: Update header files from 2454_00 to 3015_00 ...................................................................... vc/intel/fsp/ptl: Update header files from 2454_00 to 3015_00 Update header files for FSP for Panther Lake platform to version 3015_00, previous version being 2454_00. Changes include: - Update UPD Offset in FspmUpd.h & FspsUpd.h - Add Sign-of-Life related UPDs in FspmUpd.h - Add VMD related UPDs in FspsUps.h BUG=b:394189627 TEST=Able to build google/fatcat. Change-Id: I87176515d4bdd8906842fd7c2ade1e6acd339212 Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/vendorcode/intel/fsp/fsp2_0/pantherlake/FspmUpd.h M src/vendorcode/intel/fsp/fsp2_0/pantherlake/FspsUpd.h 2 files changed, 1,460 insertions(+), 1,258 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/86297/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/86297?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87176515d4bdd8906842fd7c2ade1e6acd339212 Gerrit-Change-Number: 86297 Gerrit-PatchSet: 6 Gerrit-Owner: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jayvik Desai <jayvik(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com>

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[XS] Change in coreboot[main]: mb/google/brya/var/agah: Separate the AGAH DPTF OEM variant
by John Su (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik, Tony Huang, Wisley Chen. John Su has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86493?usp=email ) Change subject: mb/google/brya/var/agah: Separate the AGAH DPTF OEM variant ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86493/comment/08db1897_e7e91a80?us… : PS2, Line 9: Use DPTF_ENABLE_OEM_VARIABLES_PROJECT_AGAH to : separate variant Agah code, allowing each OEM to adjust : in EC ASL accordingly. > Please re-flow for 72 characters per line. It’ll probably fit into two lines. Done File src/ec/google/chromeec/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/86493/comment/325048b2_70d524fb?us… : PS2, Line 383: #ifdef DPTF_ENABLE_OEM_VARIABLES_PROJECT_AGAH : Local0 = ToInteger(EOVD) & EC_OEM_VARIABLE_DATA_MASK : \_SB.DPTF.ODUP(0, Local0) : Local0 = \_SB.DPTF.ODGT(0) : \_SB.DPTF.ODVP() : Notify (\_SB.DPTF, INT3400_ODVP_CHANGED) : #endif > It’s common code. […] Because the AGAH EC code is based on monitoring adapter current to choose the corresponding DPTF OEM variable table, but not every project follows this design. It is possible that the person who originally uploaded it did not take this into consideration. -- To view, visit https://review.coreboot.org/c/coreboot/+/86493?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2929eaa65a518b06f32e33cc31ae4a01bcfb77e8 Gerrit-Change-Number: 86493 Gerrit-PatchSet: 3 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Tue, 18 Feb 2025 17:38:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/brya/var/agah: Separate the AGAH DPTF OEM variant
by John Su (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tony Huang, Wisley Chen. Hello Boris Mittelberg, Caveh Jalali, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, Tony Huang, Wisley Chen, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86493?usp=email to look at the new patch set (#3). Change subject: mb/google/brya/var/agah: Separate the AGAH DPTF OEM variant ...................................................................... mb/google/brya/var/agah: Separate the AGAH DPTF OEM variant Use DPTF_ENABLE_OEM_VARIABLES_PROJECT_AGAH to separate variant Agah code, allowing each OEM to adjust in EC ASL accordingly. BUG=b:394177292 BRANCH=None TEST=None Change-Id: I2929eaa65a518b06f32e33cc31ae4a01bcfb77e8 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/ec/google/chromeec/acpi/ec.asl M src/mainboard/google/brya/variants/agah/include/variant/ec.h 2 files changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/86493/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86493?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2929eaa65a518b06f32e33cc31ae4a01bcfb77e8 Gerrit-Change-Number: 86493 Gerrit-PatchSet: 3 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com>

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[XL] Change in coreboot[main]: vc/intel/fsp: Update PTL FSP headers to 3015.00
by Subrata Banik (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Alok Agarwal, Bora Guvendik, Cliff Huang, Intel coreboot Reviewers, Jamie Ryu, Jérémy Compostella, Ronak Kanabar, Zhixing Ma. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/86258?usp=email ) The change is no longer submittable: Code-Review is unsatisfied now. Change subject: vc/intel/fsp: Update PTL FSP headers to 3015.00 ...................................................................... Patch Set 3: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86258?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b43faa704959dce5846e22e57f81e651be2d56c Gerrit-Change-Number: 86258 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Comment-Date: Tue, 18 Feb 2025 17:02:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/pantherlake: Add support for VMD device
by Subrata Banik (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Ronak Kanabar. Subrata Banik has posted comments on this change by Ronak Kanabar. ( https://review.coreboot.org/c/coreboot/+/86301?usp=email ) Change subject: soc/intel/pantherlake: Add support for VMD device ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86301?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie391196e7b4537d1146ac30177a0ba472a1bfb43 Gerrit-Change-Number: 86301 Gerrit-PatchSet: 4 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 18 Feb 2025 17:02:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: vc/intel/fsp: Update PTL FSP headers to 3015.00
by Subrata Banik (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Alok Agarwal, Bora Guvendik, Cliff Huang, Intel coreboot Reviewers, Jamie Ryu, Jérémy Compostella, Ronak Kanabar, Zhixing Ma. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/86258?usp=email ) Change subject: vc/intel/fsp: Update PTL FSP headers to 3015.00 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86258?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b43faa704959dce5846e22e57f81e651be2d56c Gerrit-Change-Number: 86258 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Comment-Date: Tue, 18 Feb 2025 17:02:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: drivers/usb/intel_bluetooth: Use correct function to close scope
by Matt DeVillier (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86500?usp=email ) Change subject: drivers/usb/intel_bluetooth: Use correct function to close scope ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80df2ee1b51d7dbba85e556bee0fd7513ac933bb Gerrit-Change-Number: 86500 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 18 Feb 2025 16:30:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: drivers/usb/intel_bluetooth: Use correct function to close scope
by Sean Rhodes (Code Review) 18 Feb '25

18 Feb '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86500?usp=email ) Change subject: drivers/usb/intel_bluetooth: Use correct function to close scope ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86500?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80df2ee1b51d7dbba85e556bee0fd7513ac933bb Gerrit-Change-Number: 86500 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 18 Feb 2025 16:29:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/amd/common/block/pci: Prevent disabling active bridges
by Patrick Rudolph (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Maximilian Brune. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86216?usp=email ) Change subject: soc/amd/common/block/pci: Prevent disabling active bridges ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/block/pci/pcie_gpp.c: https://review.coreboot.org/c/coreboot/+/86216/comment/3372a332_a7e2ba14?us… : PS1, Line 58: static void pcie_internal_gpp_enable(struct device *dev) : { : assert(dev->enabled); : if (!dev->enabled) { : /* : * Cannot hide PPB devices! Must keep them enabled to : * make sure PCI enumeration runs and avoids resource conflicts. : */ : dev->enabled = true; : dev->hidden = true; : dev->ops = &amd_pcie_disabled_gpp_ops; : } : } > there are ways to hide the devices behind the bridges which fsp does; not 100% sure if it's the same […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86216?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia97098c860aa6cd6b0b59aa7b1c6f7c239e41983 Gerrit-Change-Number: 86216 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Feb 2025 16:22:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 18 Feb '25

18 Feb '25

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 13: (3 comments) File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/1c20a0bb_5955f105?us… : PS9, Line 250: if (!bootmem_walk(fit_place_mem, firmware)) > You shouldn't need to walk if you only want one specific address, you can just use `bootmem_region_t […] The advantage of walking is that if no specific load address is requested, then `bootmem_walk` gets the 'minimum supported address' as 0 and just gets us any piece of memory available. It supports the behaviour of both functions in one. https://review.coreboot.org/c/coreboot/+/84796/comment/c514870f_ef8fd33d?us… : PS9, Line 307: if (secondary_image->load_address && secondary_image->load_address != region_offset(&secondary_region)) { > Same here, I'd suggest to first check if the load address is given, and if it is just check `bootmem […] I don't think this is going to end up looking similar to what it looks like at the moment. Especially when `bootmem_allocate_buffer` already does a `bootmem_add_range`, so we'd have to put more code under an if-block (whereas at the moment, we're just selecting an offset). If we could guarantee that secondary images would *never* request a load address (and bring relocation information if needed), this does simplify down to `bootmem_allocate_buffer`, yes. But I'm not sure I can guarantee that File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/200393fe_1694ba1b?us… : PS11, Line 203: if (config->ramdisk && > Can merge this into previous `if` now. True, but it means nesting if-statements or a `if (!config->ramdisk) goto end;` I think it looks neater as is, do you really prefer this? -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 13 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 18 Feb 2025 15:57:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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