coreboot-gerrit January 2025

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[M] Change in coreboot[main]: Update Maintainers file
by Martin L Roth (Code Review) 07 Jan '25

07 Jan '25

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85883?usp=email ) Change subject: Update Maintainers file ...................................................................... Update Maintainers file - Update AMD maintainers lists to reflect current situation - Remove Ron Minnich as maintainer (At his request) - Update the Infrastructure owners to reflect the current situation. Change-Id: I2feac94595081fcea9becd9d8067ddd99a50123c Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- M MAINTAINERS 1 file changed, 24 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/85883/1 diff --git a/MAINTAINERS b/MAINTAINERS index 45bcac0..396e4cf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,12 +137,12 @@ AMD non-server family 17h and 19h reference boards M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> +M: Nick Kochlowski <nickkochlowski(a)gmail.com> M: Fred Reitberger <reitbergerfred(a)gmail.com> -L: amd_coreboot_org_changes(a)googlegroups.com S: Maintained F: src/mainboard/amd/bilby/ F: src/mainboard/amd/birman/ +F: src/mainboard/amd/birman_plus/ F: src/mainboard/amd/chausie/ F: src/mainboard/amd/majolica/ F: src/mainboard/amd/mandolin/ @@ -150,14 +150,11 @@ AMD server family 19h reference boards M: Felix Held <felix-coreboot(a)felixheld.de> -M: Martin Roth <gaumless(a)gmail.com> -M: Varshit Pandya <pandyavarshit(a)gmail.com> S: Maintained F: src/mainboard/amd/onyx_poc/ AMD reference boards outside of family 17h and 19h -S: Odd Fixes -L: amd_coreboot_org_changes(a)googlegroups.com +S: Orphan F: src/mainboard/amd/gardenia/ F: src/mainboard/amd/pademelon/ @@ -382,9 +379,9 @@ F: src/mainboard/google/stout/ GOOGLE AMD-BASED MAINBOARDS -M: Martin Roth <martin.roth(a)amd.corp-partner.google.com> +M: Martin Roth <gaumless(a)gmail.com> M: Jason Nien <jason.nien(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com +M: Matt DeVillier <MrChromebox(a)gmail.com> S: Supported F: src/mainboard/google/kahlee/ F: src/mainboard/google/zork/ @@ -671,7 +668,6 @@ F: util/rockchip/ PPC64 ARCHITECTURE -M: Ronald Minnich <rminnich(a)gmail.com> M: Timothy Pearson <tpearson(a)raptorengineeringinc.com> S: Maintained F: src/arch/ppc64/ @@ -679,7 +675,6 @@ F: src/mainboard/emulation/qemu-power8/ RISC-V ARCHITECTURE -M: Ronald Minnich <rminnich(a)gmail.com> M: Maximilian Brune <maximilian.brune(a)9elements.com> R: Philipp Hug <philipp(a)hug.cx> S: Maintained @@ -773,8 +768,11 @@ ################################################################################ AMD SUPPORT -L: amd_coreboot_org_changes(a)googlegroups.com -S: Odd Fixes +M: Felix Held <felix-coreboot(a)felixheld.de> +M: Martin Roth <gaumless(a)gmail.com> +M: Nick Kochlowski <nickkochlowski(a)gmail.com> +M: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> +S: Maintained F: src/vendorcode/amd/ F: src/cpu/amd/ F: src/northbridge/amd/ @@ -814,64 +812,41 @@ AMD Cezanne M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> -M: Fred Reitberger <reitbergerfred(a)gmail.com> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com S: Maintained F: src/soc/amd/cezanne/ F: src/vendorcode/amd/fsp/cezanne/ AMD common SoC code M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> -M: Fred Reitberger <reitbergerfred(a)gmail.com> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com S: Maintained F: src/soc/amd/common/ AMD Genoa Proof of Concept M: Felix Held <felix-coreboot(a)felixheld.de> M: Martin Roth <gaumless(a)gmail.com> -M: Varshit Pandya <pandyavarshit(a)gmail.com> S: Maintained F: src/soc/amd/genoa_poc/ AMD Mendocino M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> -M: Fred Reitberger <reitbergerfred(a)gmail.com> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com -S: Supported +S: Maintained F: src/soc/amd/mendocino/ F: src/vendorcode/amd/fsp/mendocino/ AMD Picasso M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> -M: Fred Reitberger <reitbergerfred(a)gmail.com> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com S: Maintained F: src/soc/amd/picasso/ F: src/vendorcode/amd/fsp/picasso/ AMD Phoenix M: Felix Held <felix-coreboot(a)felixheld.de> -M: Jason Glenesk <jason.glenesk(a)gmail.com> -M: Fred Reitberger <reitbergerfred(a)gmail.com> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com -S: Supported +S: Maintained F: src/soc/amd/phoenix/ F: src/vendorcode/amd/fsp/phoenix/ AMD Stoneyridge M: Felix Held <felix-coreboot(a)felixheld.de> -M: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> -L: amd_coreboot_org_changes(a)googlegroups.com S: Odd Fixes F: src/soc/amd/stoneyridge/ @@ -1232,47 +1207,42 @@ # *** Infrastructure Owners *** # This is intended to let people know who they should contact for issues with various infrastructure pieces. # Hardware -# Owners: Patrick +# Owners: Felix Singer <felixsinger(a)posteo.net> # Backups: # Web Server -# Owners: Patrick +# Owners: Felix Singer <felixsinger(a)posteo.net> # Backups: # Website -# Owners: Martin -# Backups: Patrick +# Owners: +# Backups: # Documentation Website -# Owners: Patrick +# Owners: Felix Singer <felixsinger(a)posteo.net> # Backups: CODE OF CONDUCT -M: Ronald Minnich <rminnich(a)gmail.com> -M: Martin Roth <martin(a)coreboot.org> +M: Martin Roth <gaumless(a)gmail.com> S: Maintained F: Documentation/community/code_of_conduct.md -# Wiki -# Owners: Patrick -# Backups: - # Gerrit -# Owners: Patrick -# Backups: Martin +# Owners: Felix Singer <felixsinger(a)posteo.net> +# Backups: Martin Roth # Jenkins -# Owners: Patrick, Martin +# Owners: Felix Singer <felixsinger(a)posteo.net> # Backups: # Bug Tracker # Owners: Lynxis, -# Backups: Martin, +# Backups: Felix Singer <felixsinger(a)posteo.net> # Mailing List # Owners: Patrick -# Backups: Martin +# Backups: # Software Freedom Conservancy -# Main contact: Martin +# Main contact: Martin Roth # “Official” contact: David, Matt, Werner -- To view, visit https://review.coreboot.org/c/coreboot/+/85883?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2feac94595081fcea9becd9d8067ddd99a50123c Gerrit-Change-Number: 85883 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com>

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[S] Change in coreboot[main]: cpu/x86/64bit/mode_switch: Work around FSP bug
by Maximilian Brune (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Arthur Heymans, Jincheng Li, Patrick Rudolph, Paul Menzel, Ray Ni. Maximilian Brune has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85789?usp=email ) Change subject: cpu/x86/64bit/mode_switch: Work around FSP bug ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Out of curiosity I tried a AMD glinda mainboard and with your patch x64 successfully boots (without the patch its stuck in the beginning of FSP-M). -- To view, visit https://review.coreboot.org/c/coreboot/+/85789?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I56367d8153aa10a9b1bcaa5ffde8ebe202e8c00c Gerrit-Change-Number: 85789 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ray Ni <ray.ni(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 07 Jan 2025 19:21:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: tree: Use "true", "false" for *acoustic_noise_mitigation
by Kapil Porwal (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Angel Pons, Christian Walter, Dinesh Gehlot, Elyes Haouas, Eran Mitrani, Eric Lai, Jakub Czapiga, Jayvik Desai, Nick Vaccaro, Subrata Banik, Tarun. Kapil Porwal has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/85880?usp=email ) Change subject: tree: Use "true", "false" for *acoustic_noise_mitigation ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85880?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb1d2743222ff5100527fc6413cc13226a087904 Gerrit-Change-Number: 85880 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 07 Jan 2025 17:02:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos
by Martin Roth (Code Review) 07 Jan '25

07 Jan '25

Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85819?usp=email ) Change subject: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos ...................................................................... vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos Fix the typo in the word "unknown", and add 1 to the timepoint enum to print out 1, 2 and 3 instead of 0, 1 and 2. Change-Id: I1308fd102490a89ff8b724509917180034d8d0c0 Signed-off-by: Nicolas Kochlowski <nickkochlowski(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85819 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/vendorcode/amd/opensil/genoa_poc/ramstage.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: Martin Roth: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c index b1bbc07..bb3cad1 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c +++ b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c @@ -18,7 +18,7 @@ void SIL_STATUS_report(const char *function, const int status) { const int log_level = status == SilPass ? BIOS_DEBUG : BIOS_ERR; - const char *error_string = "Unkown error"; + const char *error_string = "Unknown error"; const struct error_string_entry { SIL_STATUS status; @@ -151,7 +151,7 @@ return; } char opensil_function[16]; - snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp); + snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp + 1); SIL_STATUS_report(opensil_function, ret); if (ret == SilResetRequestColdImm || ret == SilResetRequestColdDef) { printk(BIOS_INFO, "openSIL requested a cold reset"); -- To view, visit https://review.coreboot.org/c/coreboot/+/85819?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1308fd102490a89ff8b724509917180034d8d0c0 Gerrit-Change-Number: 85819 Gerrit-PatchSet: 2 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos
by Martin Roth (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Nick Kochlowski. Martin Roth has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/85819?usp=email ) Change subject: vendorcode/amd/opensil/genoa_poc/ramstage.c: Fix log typos ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85819?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1308fd102490a89ff8b724509917180034d8d0c0 Gerrit-Change-Number: 85819 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 16:20:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: ec/starlabs/merlin: Add support for setting the charging speed
by Matt DeVillier (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Angel Pons, Maxim Polyakov, Maximilian Brune, Paul Menzel, Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84633?usp=email ) Change subject: ec/starlabs/merlin: Add support for setting the charging speed ...................................................................... Patch Set 19: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84633?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46faa540530c5bd7f5473021561380213158152e Gerrit-Change-Number: 84633 Gerrit-PatchSet: 19 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 16:00:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hope Wang, Hung-Te Lin, Jarried Lin. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85799?usp=email ) Change subject: soc/mediatek/mt8196: Delay 0.5ms after enabling PMIF SPMI SW interface ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85799?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I63df384061e4ed2629238f1843decd18d1ad1ac4 Gerrit-Change-Number: 85799 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 14:57:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/siemens/mc_ehl2: Limit eMMC speed mode to DDR50
by Mario Scheithauer (Code Review) 07 Jan '25

07 Jan '25

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85881?usp=email ) Change subject: mb/siemens/mc_ehl2: Limit eMMC speed mode to DDR50 ...................................................................... mb/siemens/mc_ehl2: Limit eMMC speed mode to DDR50 Due to layout restrictions on mc_ehl2, the eMMC interface is limited to operate in DDR50 mode. The alternative modes SDR104 and SDR50 are not supported. Limit the capabilities in the eMMC controller to DDR50 mode only so that the eMMC driver in OS will choose the right mode for operation even if the attached eMMC card supports higher modes. BUG=none TEST=Boot into Linux and check dmesg output for mmc modes Change-Id: I668bb5b0b3197497920b36bcf283c25d2a0c00ba Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/85881/1 diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c index 76f7593..a59b69c 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c @@ -49,6 +49,15 @@ /* Use preset driver strength from preset value registers. */ clrsetbits16(res2mmio(res, HOSTCTRL2, 0), 0, HOSTCTRL2_PRESET); } + + dev = pcidev_path_on_root(PCH_DEVFN_EMMC); + if (dev) { + struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0); + if (!res) + return; + + disable_sdr_modes(res); + } } static void finalize_boot(void *unused) -- To view, visit https://review.coreboot.org/c/coreboot/+/85881?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I668bb5b0b3197497920b36bcf283c25d2a0c00ba Gerrit-Change-Number: 85881 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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[XS] Change in coreboot[main]: mb/starlabs/merlin: Remove unused definition
by Sean Rhodes (Code Review) 07 Jan '25

07 Jan '25

Sean Rhodes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/85708?usp=email ) Change subject: mb/starlabs/merlin: Remove unused definition ...................................................................... Abandoned Not needed -- To view, visit https://review.coreboot.org/c/coreboot/+/85708?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I292fb42d11b52083a1dc2cde1164daaef3abfb6e Gerrit-Change-Number: 85708 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com>

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[L] Change in coreboot[main]: Documentation: Update information about intelp2m
by Filip Lewiński (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Felix Singer, Maxim Polyakov, Paul Menzel. Filip Lewiński has posted comments on this change by Maxim Polyakov. ( https://review.coreboot.org/c/coreboot/+/71757?usp=email ) Change subject: Documentation: Update information about intelp2m ...................................................................... Patch Set 15: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/71757?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80d5fb5d46b50193e8fecc647d9052a2e29af93f Gerrit-Change-Number: 71757 Gerrit-PatchSet: 15 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 07 Jan 2025 13:32:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit January 2025