coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

1 participants
3269 discussions

[S] Change in coreboot[main]: soc/intel/xeon_sp: Allow OS to control LTR and AER
by Shuo Liu (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85561?usp=email ) Change subject: soc/intel/xeon_sp: Allow OS to control LTR and AER ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85561?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c4176a4df898cee28f6319c6684763e825d9c46 Gerrit-Change-Number: 85561 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:14:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/fatcat/var/felino: Add ALC712 codec to devicetree
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Mac Chiang, Paul Menzel, Pranava Y N, Varun Upadhyay, Weimin Wu. Subrata Banik has posted comments on this change by Weimin Wu. ( https://review.coreboot.org/c/coreboot/+/85572?usp=email ) Change subject: mb/google/fatcat/var/felino: Add ALC712 codec to devicetree ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85572?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic5c38462cd1ab39d4aebc324d5151cb4337051df Gerrit-Change-Number: 85572 Gerrit-PatchSet: 3 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:11:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: drivers/soundwire: Support Realtek ALC712 codec
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Mac Chiang, Naveen M, Pranava Y N, Varun Upadhyay, Weimin Wu. Subrata Banik has posted comments on this change by Weimin Wu. ( https://review.coreboot.org/c/coreboot/+/85571?usp=email ) Change subject: drivers/soundwire: Support Realtek ALC712 codec ...................................................................... Patch Set 2: (2 comments) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85571/comment/09a0722e_c3110a18?us… : PS2, Line 13: static struct soundwire_multilane alc711_multilane = { : }; > understanding the original query from subrata, since there is a struct alc711_multilane defined, whe […] Acknowledged https://review.coreboot.org/c/coreboot/+/85571/comment/71f8a89b_fec0506f?us… : PS2, Line 130: { you can avoid braces for single line statement? -- To view, visit https://review.coreboot.org/c/coreboot/+/85571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib79896a9fe23f2f66d6ee3a24f5a62bfa0f7a649 Gerrit-Change-Number: 85571 Gerrit-PatchSet: 2 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:10:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Varun Upadhyay <varun.upadhyay(a)intel.com> Comment-In-Reply-To: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Naveen M <naveen.m(a)intel.corp-partner.google.com>

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[XS] Change in coreboot[main]: intel/common/rtd3: Allow emitting PSD0 Method for CPU Root Ports
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Sean Rhodes. Subrata Banik has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85696?usp=email ) Change subject: intel/common/rtd3: Allow emitting PSD0 Method for CPU Root Ports ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/85696/comment/262ee399_fcca289e?us… : PS5, Line 437: if (rp_type != PCIE_RP_PCH) { earlier code was applicable for both CPU RPs as well but your patch looks like limiting it to only unknown RPs ? ``` enum pcie_rp_type { PCIE_RP_UNKNOWN, PCIE_RP_CPU, PCIE_RP_PCH, }; ``` is there any doc to refer is `ext_pm_support` support also applies for CPU RPs ? not sure why it had been limited initially. -- To view, visit https://review.coreboot.org/c/coreboot/+/85696?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia34cc1f9099ca88fa16a83174ec90ca14f43ab56 Gerrit-Change-Number: 85696 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:08:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/pantherlake: Refactor FSP-M params for debug message control
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85827?usp=email ) Change subject: soc/intel/pantherlake: Refactor FSP-M params for debug message control ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > I am just wondering: Why ? And why isn't Intel looped in a patch review like this ? please help to add yourself as maintainer for SOC and mainboard to get added. that is how folks are getting added automatically in code review -- To view, visit https://review.coreboot.org/c/coreboot/+/85827?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie2916ce82133058464d20eed327de7c7288e78a4 Gerrit-Change-Number: 85827 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:06:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[M] Change in coreboot[main]: mb/siemens/mc_ehl{2...5}: Fix return in variant_mainboard_final()
by Mario Scheithauer (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Mario Scheithauer, Werner Zeh. Hello Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85891?usp=email to look at the new patch set (#2). Change subject: mb/siemens/mc_ehl{2...5}: Fix return in variant_mainboard_final() ...................................................................... mb/siemens/mc_ehl{2...5}: Fix return in variant_mainboard_final() If no resource is found for a device, do not return directly, otherwise the following code will no longer be executed. Change-Id: Ida8019c383df4be2d37a1532a1759086e86124e6 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c M src/mainboard/siemens/mc_ehl/variants/mc_ehl3/mainboard.c M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/mainboard.c 4 files changed, 32 insertions(+), 32 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/85891/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85891?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida8019c383df4be2d37a1532a1759086e86124e6 Gerrit-Change-Number: 85891 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[M] Change in coreboot[main]: mb/siemens/mc_ehl{2...4}: Simplify SD code as well as for mc_ehl5
by Mario Scheithauer (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Mario Scheithauer. Hello Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85864?usp=email to look at the new patch set (#4). Change subject: mb/siemens/mc_ehl{2...4}: Simplify SD code as well as for mc_ehl5 ...................................................................... mb/siemens/mc_ehl{2...4}: Simplify SD code as well as for mc_ehl5 The latest patch chain for mc_ehl5, commit 2d9a82cf8a57 ("mb/siemens/mc_ehl5: Rename SDIO converge layer register defines") and following patches, have simplified the SD card code. This patch now adapts the other mc_ehl mainboards accordingly to standardize the code. Change-Id: Ieb2d540656408d2ce57a34e3e443b4273b9c48bb Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_ehl/variants/mc_ehl2/mainboard.c M src/mainboard/siemens/mc_ehl/variants/mc_ehl3/mainboard.c M src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c 3 files changed, 56 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/85864/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85864?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieb2d540656408d2ce57a34e3e443b4273b9c48bb Gerrit-Change-Number: 85864 Gerrit-PatchSet: 4 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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[M] Change in coreboot[main]: soc/intel/pantherlake: Add core scaling factors read support
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Jérémy Compostella. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85554?usp=email ) Change subject: soc/intel/pantherlake: Add core scaling factors read support ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: i don't believe we really need to apply dynamic setting for CrOS configuration because CrOS always works over a fixed CPU configuration like 15W therefore, static value might still servers us better and no need to subscribe to the dynamic implementation. -- To view, visit https://review.coreboot.org/c/coreboot/+/85554?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a8e1e66a02e4bf6b1a41277e83c6dec786fe169 Gerrit-Change-Number: 85554 Gerrit-PatchSet: 11 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:04:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/pantherlake: Add core scaling factors read support
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Jérémy Compostella. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85554?usp=email ) Change subject: soc/intel/pantherlake: Add core scaling factors read support ...................................................................... Patch Set 11: (1 comment) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/85554/comment/600a3f20_fc822b3f?us… : PS11, Line 18: enum cpu_perf_eff_type { : CPU_TYPE_EFF, : CPU_TYPE_PERF, : }; this code change and https://review.coreboot.org/c/coreboot/+/85554/11/src/soc/intel/common/bloc… can be pushed as part of separate CL to avoid combining SoC and common code together into same patch -- To view, visit https://review.coreboot.org/c/coreboot/+/85554?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a8e1e66a02e4bf6b1a41277e83c6dec786fe169 Gerrit-Change-Number: 85554 Gerrit-PatchSet: 11 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 11:00:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/common: Read core scaling factors at runtime support
by Subrata Banik (Code Review) 08 Jan '25

08 Jan '25

Attention is currently required from: Jérémy Compostella. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85553?usp=email ) Change subject: soc/intel/common: Read core scaling factors at runtime support ...................................................................... Patch Set 8: (1 comment) File src/soc/intel/common/block/acpi/cpu_hybrid.c: https://review.coreboot.org/c/coreboot/+/85553/comment/b8148d47_ecbce09f?us… : PS8, Line 126: if (!performance) { : if (CONFIG(SOC_INTEL_COMMON_BLOCK_RUNTIME_CORE_SCALING_FACTORS)) { : soc_read_core_scaling_factors(&performance, &efficient); : } else { : performance = CONFIG_SOC_INTEL_PERFORMANCE_CORE_SCALE_FACTOR; : efficient = CONFIG_SOC_INTEL_EFFICIENT_CORE_SCALE_FACTOR; : } : } based on https://review.coreboot.org/c/coreboot/+/85553/comment/c8d7ca09_86e815fa/ ``` if (!performance) soc_read_core_scaling_factors(&performance, &efficient); ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icdf47e17cc5a6d042f3c5f90cf811fccd6c1ed9b Gerrit-Change-Number: 85553 Gerrit-PatchSet: 8 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 08 Jan 2025 10:59:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit January 2025