coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add thermal driver
by Zhaoqing Jiu (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Zhaoqing Jiu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86017?usp=email ) Change subject: soc/mediatek/mt8196: Add thermal driver ...................................................................... Patch Set 2: (2 comments) File src/soc/mediatek/mt8196/mt_thermal_sram_init.c: https://review.coreboot.org/c/coreboot/+/86017/comment/7770b97d_b8e78dd7?us… : PS2, Line 32: int i = 0; : uint32_t pattern = 0xffffffff; : uint32_t *buff = (uint32_t *)THERMAL_STAT_SRAM_BASE; : for (i = 0; i < THERMAL_STAT_SRAM_LEN / 4; i++) { : *buff = pattern; : buff++; : } > I assume `memset((void *)THERMAL_STAT_SRAM_BASE, 0xFF, THERMAL_STAT_SRAM_LEN)` would be faster. Would it be better to align the same style with thermal_cls_sram() function? https://review.coreboot.org/c/coreboot/+/86017/comment/437e48a3_62b159b8?us… : PS2, Line 48: int i = 0; : uint32_t pattern = 0xffffffff; : uint32_t *buff = (uint32_t *)GPU_THERMAL_STAT_SRAM_BASE; : for (i = 0; i < GPU_THERMAL_STAT_SRAM_LEN / 4; i++) { : *buff = pattern; : buff++; : } > Use memset? Would it be better to align the same style with thermal_cls_sram() function? -- To view, visit https://review.coreboot.org/c/coreboot/+/86017?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieef94a6909e4da82461351bcb9292e9d01db3362 Gerrit-Change-Number: 86017 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:35:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add mtk-fsp loader in romstage
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86014?usp=email ) Change subject: soc/mediatek/mt8196: Add mtk-fsp loader in romstage ...................................................................... Patch Set 2: (1 comment) File src/soc/mediatek/mt8196/include/soc/memlayout.ld: https://review.coreboot.org/c/coreboot/+/86014/comment/bff1482d_816496d2?us… : PS2, Line 60: FSP_INIT_CODE The symbol is conflict with one in the ramstage, right ? @yupingso@google.com -- To view, visit https://review.coreboot.org/c/coreboot/+/86014?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I73710227e6d9e3f0c717e17db0cc798265eb1f72 Gerrit-Change-Number: 86014 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:30:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add mtk-fsp loader in ramstage
by Yidi Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86013?usp=email ) Change subject: soc/mediatek/mt8196: Add mtk-fsp loader in ramstage ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86013?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia73d241694ca9a4686bf4b0533c51a663a765c21 Gerrit-Change-Number: 86013 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:23:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/fatcat/var/felino: Modify the felino config for probing TPM...
by Weimin Wu (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Pranava Y N, Tongtong Pan. Weimin Wu has posted comments on this change by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/85965?usp=email ) Change subject: mb/google/fatcat/var/felino: Modify the felino config for probing TPM I2C ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/fatcat/variants/felino/gpio.c: https://review.coreboot.org/c/coreboot/+/85965/comment/7afdec1c_f2400f0d?us… : PS1, Line 415: PAD_CFG_NF(GPP_C04, NONE, DEEP, NF1), : : /* GPP_H21: PCH_I2C_GSC_SDA */ : PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), : /* GPP_H22: PCH_I2C_GSC_SCL */ : PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), : /* GPP_F15: SPI_TPM_INT_N */ : PAD_CFG_GPI_APIC_LOCK(GPP_F15, NONE, LEVEL, INVERT, LOCK_CONFIG), I don't think it's necessary to add these in romstage. -- To view, visit https://review.coreboot.org/c/coreboot/+/85965?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I093c0bad181f133e601f3270de68c0848f847ccf Gerrit-Change-Number: 85965 Gerrit-PatchSet: 1 Gerrit-Owner: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:19:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/mediatek: Introduce mtk_edp_enable() to fix eDP init flow
by Nancy Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Nancy Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86028?usp=email ) Change subject: soc/mediatek: Introduce mtk_edp_enable() to fix eDP init flow ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Look good to me -- To view, visit https://review.coreboot.org/c/coreboot/+/86028?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief847320caca1af1c6deb242dc224e7698a6603c Gerrit-Change-Number: 86028 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:19:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: cbfstool: Add hash to more than one region
by Bao Zheng (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Felix Held, Julius Werner, Marshall Dawson, Zheng Bao. Bao Zheng has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85468?usp=email ) Change subject: cbfstool: Add hash to more than one region ...................................................................... Patch Set 13: (1 comment) Patchset: PS1: > Sorry, I don't understand the "Done". Did you explain this somewhere else? Did I miss it? […] For the AB recovery, we are trying to make a duplicated copy of all the modules which is needed for a complete boot process. If a corruption happens in partition A, it will reboot from partition B. Unlike vboot frame work, AB recovery has some difference. -There is not RO section. -There are two coreboot regions, which contain the romstage, ramstage, bootblock, payload, etc. So it is hard to extend the vboot to implement AB recovery. Currently the AB recovery and vboot are in parallel in CBFS. -- To view, visit https://review.coreboot.org/c/coreboot/+/85468?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f9a5baa2699468380b942b3bdc104cab78adf5f Gerrit-Change-Number: 85468 Gerrit-PatchSet: 13 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:09:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: mb/google/rauru: Run mtk-fsp in romstage
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add mtk-fsp loader in romstage
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add DDP driver
by Nancy Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Nancy Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85950?usp=email ) Change subject: soc/mediatek/mt8196: Add DDP driver ...................................................................... Patch Set 7: (1 comment) File src/soc/mediatek/mt8196/ddp.c: https://review.coreboot.org/c/coreboot/+/85950/comment/2d755f72_fbfcb1e0?us… : PS3, Line 212: blender_config(i, width, height, blender_type[i]); : blender_start(i); > OK, I will modify it. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85950?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I006911e83d940c1eec7135a6a0c36fbfa2aad466 Gerrit-Change-Number: 85950 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:01:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nancy Lin <nancy.lin(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add mtk-fsp loader in ramstage
by Jarried Lin (Code Review) 17 Jan '25

17 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86013?usp=email ) Change subject: soc/mediatek/mt8196: Add mtk-fsp loader in ramstage ...................................................................... Patch Set 2: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86013/comment/8190a5f4_1f74e311?us… : PS1, Line 9: include > includes Done https://review.coreboot.org/c/coreboot/+/86013/comment/5439434b_e559781c?us… : PS1, Line 9: is a new blob that include > `contains blobs that include` (because we have 2 blobs) Done File src/soc/mediatek/common/include/soc/memlayout.h: https://review.coreboot.org/c/coreboot/+/86013/comment/10e7e42e_a5543939?us… : PS1, Line 24: #define FSP_INIT_CODE(addr, size) \ > I am wrong. The region is served to run the binary. Please ignore my comment. Done File src/soc/mediatek/mt8196/Makefile.mk: https://review.coreboot.org/c/coreboot/+/86013/comment/321fa64e_940829c0?us… : PS1, Line 99: FSP_CBFS > `FSP_RAMSTAGE_CBFS` Done https://review.coreboot.org/c/coreboot/+/86013/comment/1eb77a81_9948de47?us… : PS1, Line 104: > No indentation. Done File src/soc/mediatek/mt8196/soc.c: https://review.coreboot.org/c/coreboot/+/86013/comment/30df133d_99f19232?us… : PS1, Line 38: ufs_storage_type > storage_type Done https://review.coreboot.org/c/coreboot/+/86013/comment/2876e4ce_c42b33d3?us… : PS1, Line 40: sizeof(ufs_storage_type), &ufs_storage_type); > move to above line Done https://review.coreboot.org/c/coreboot/+/86013/comment/9564e6d6_d1849cbe?us… : PS1, Line 41: mtk_fsp_load_and_run(); > add a blank line below Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86013?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia73d241694ca9a4686bf4b0533c51a663a765c21 Gerrit-Change-Number: 86013 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 17 Jan 2025 03:01:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit January 2025